Estimating path delay distribution considering coupling noise. - Rajeshwary Tayade; Vijay Kiran Kalyanam; Sani R. Nassif; Michael Orshansky; Jacob A. Abraham (ACM Great Lakes Symposium on VLSI, 2007)

Power-aware multi-voltage custom memory models for enhancing RTL and low power verification. - Vijay Kiran Kalyanam; Martin Saint-Laurent; Jacob A. Abraham (ICCD, 2015)

Power prediction of embedded scalar and vector processor: Challenges and solutions. - Vijay Kiran Kalyanam; Peter G. Sassone; Jacob A. Abraham (ISQED, 2017)

Randomized Pulse-Modulating Instruction-Issue Control Circuit for a Current and Temperature Limiting System in a 7nm Hexagon™ Compute DSP. - Vijay Kiran Kalyanam; Eric Mahurin; Keith A. Bowman; Jacob A. Abraham (CICC, 2020)

Functional Test Sequences for Inducing Voltage Droops in a Multi-Threaded Processor. - Vijay Kiran Kalyanam; Eric Mahurin; Michael Spence; Jacob A. Abraham (ITC, 2020)

A Proactive Voltage-Droop-Mitigation System in a 7nm Hexagon™ Processor. - Vijay Kiran Kalyanam; Eric Mahurin; Keith A. Bowman; Jacob A. Abraham (VLSI Circuits, 2020)

35.3 Thread-Level Power Management for a Current- and Temperature-Limiting System in a 7nm Hexagon™ Processor. - Vijay Kiran Kalyanam; Eric Mahurin; Keith A. Bowman; Suresh Venkumahanti (ISSCC, 2021)

A Current and Temperature Limiting System in a 7-nm Hexagon™ Compute Digital Signal Processor. - Vijay Kiran Kalyanam; Eric Mahurin; Keith A. Bowman; Jacob A. Abraham (IEEE J. Solid State Circuits, 2021)

A Proactive System for Voltage-Droop Mitigation in a 7-nm Hexagon™ Processor. - Vijay Kiran Kalyanam; Eric Mahurin; Keith A. Bowman; Jacob A. Abraham (IEEE J. Solid State Circuits, 2021)