High-throughput VLSI implementations of iterative decoders and related code construction problems. - Vijay Nagarajan; Nikhil Jayakumar; Sunil P. Khatri; Olgica Milenkovic (GLOBECOM, 2004)

The effect of channel side information at transmitter on coding complexity. - Vijay Nagarajan; Youjian Liu; Jilei Hou (ISIT, 2004)

Matching Control Flow of Program Versions. - Vijayanand Nagarajan; Rajiv Gupta 001; Matias Madou; Xiangyu Zhang 001; Bjorn De Sutter (ICSM, 2007)

ONTRAC: A system for efficient ONline TRACing for debugging. - Vijayanand Nagarajan; Dennis Jeffrey; Rajiv Gupta 001; Neelam Gupta (ICSM, 2007)

High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems. - Vijay Nagarajan; Stefan Laendner; Nikhil Jayakumar; Olgica Milenkovic; Sunil P. Khatri (J. VLSI Signal Process., 2007)

Scalable dynamic information flow tracking and its applications. - Rajiv Gupta 001; Neelam Gupta; Xiangyu Zhang 001; Dennis Jeffrey; Vijay Nagarajan; Sriraman Tallam; Chen Tian 002 (IPDPS, 2008)

Support for symmetric shadow memory in multiprocessors. - Vijay Nagarajan; Rajiv Gupta 001 (PADTAD, 2008)

Dynamic recognition of synchronization operations for improved data race detection. - Chen Tian 002; Vijay Nagarajan; Rajiv Gupta 001; Sriraman Tallam (ISSTA, 2008)

Copy or Discard execution model for speculative parallelization on multicores. - Chen Tian 002; Min Feng 001; Vijay Nagarajan; Rajiv Gupta 001 (MICRO, 2008)

ECMon: exposing cache events for monitoring. - Vijay Nagarajan; Rajiv Gupta 001 (ISCA, 2009)

Self-recovery in server programs. - Vijay Nagarajan; Dennis Jeffrey; Rajiv Gupta 001 (ISMM, 2009)

Speculative Optimizations for Parallel Programs on Multicores. - Vijay Nagarajan; Rajiv Gupta 001 (LCPC, 2009)

Architectural support for shadow memory in multiprocessors. - Vijay Nagarajan; Rajiv Gupta 001 (VEE, 2009)

Speculative Parallelization of Sequential Loops on Multicores. - Chen Tian 002; Min Feng 001; Vijay Nagarajan; Rajiv Gupta 001 (Int. J. Parallel Program., 2009)

Runtime monitoring on multicores via OASES. - Vijay Nagarajan; Rajiv Gupta 001 (ACM SIGOPS Oper. Syst. Rev., 2009)

Automated dynamic detection of busy-wait synchronizations. - Chen Tian 002; Vijay Nagarajan; Rajiv Gupta 001; Sriraman Tallam (Softw. Pract. Exp., 2009)

Compiler-Assisted Memory Encryption for Embedded Processors. - Vijay Nagarajan; Rajiv Gupta 001; Arvind Krishnaswamy (Trans. High Perform. Embed. Archit. Compil., 2009)

IMPRESS: Improving Multicore Performance and Reliability via Efficient Software Support for Monitoring. - Vijayanand Nagarajan (2009)

Execution suppression: An automated iterative technique for locating memory errors. - Dennis Jeffrey; Vijay Nagarajan; Rajiv Gupta 001; Neelam Gupta (ACM Trans. Program. Lang. Syst., 2010)

Efficient sequential consistency via conflict ordering. - Changhui Lin; Vijay Nagarajan; Rajiv Gupta 001; Bharghava Rajaram (ASPLOS, 2012)

SuperCoP: a general, correct, and performance-efficient supervised memory system. - Bharghava Rajaram; Vijay Nagarajan; Andrew J. McPherson; Marcelo Cintra (Conf. Computing Frontiers, 2012)

Efficient Sequential Consistency Using Conditional Fences. - Changhui Lin; Vijay Nagarajan; Rajiv Gupta 001 (Int. J. Parallel Program., 2012)

A system for debugging via online tracing and dynamic slicing. - Vijay Nagarajan; Dennis Jeffrey; Rajiv Gupta 001; Neelam Gupta (Softw. Pract. Exp., 2012)

Erratum: A system for debugging via online tracing and dynamic slicing. - Vijay Nagarajan; Dennis Jeffrey; Rajiv Gupta 001; Neelam Gupta (Softw. Pract. Exp., 2012)

Address-aware fences. - Changhui Lin; Vijay Nagarajan; Rajiv Gupta 001 (ICS, 2013)

Fast RMWs for TSO: semantics and implementation. - Bharghava Rajaram; Vijay Nagarajan; Susmit Sarkar; Marco Elver (PLDI, 2013)

ATCache: reducing DRAM cache latency via a small SRAM tag cache. - Cheng-Chieh Huang; Vijay Nagarajan (PACT, 2014)

TSO-CC: Consistency directed cache coherence for TSO. - Marco Elver; Vijay Nagarajan (HPCA, 2014)

Increasing cache capacity via critical-words-only cache. - Cheng-Chieh Huang; Vijay Nagarajan (ICCD, 2014)

Static Approximation of MPI Communication Graphs for Optimized Process Placement. - Andrew J. McPherson; Vijay Nagarajan; Marcelo Cintra (LCPC, 2014)

Fence Scoping. - Changhui Lin; Vijay Nagarajan; Rajiv Gupta 001 (SC, 2014)

Erratum: A system for debugging via online tracing and dynamic slicing. - Vijay Nagarajan; Dennis Jeffrey; Rajiv Gupta 001 (Softw. Pract. Exp., 2014)

RC3: Consistency Directed Cache Coherence for x86-64 with RC Extensions. - Marco Elver; Vijay Nagarajan (PACT, 2015)

Dynamic process migration in heterogeneous ROS-based environments. - José Cano 001; Eduardo J. Molinos; Vijay Nagarajan; Sethu Vijayakumar (ICAR, 2015)

Efficient persist barriers for multicores. - Arpit Joshi; Vijay Nagarajan; Marcelo Cintra; Stratis Viglas (MICRO, 2015)

Understanding the Effects of Data Corruption on Application Behavior Based on Data Characteristics. - Georgios Stefanakis; Vijay Nagarajan; Marcelo Cintra (SAFECOMP, 2015)

McVerSi: A test generation framework for fast memory consistency verification in simulation. - Marco Elver; Vijay Nagarajan (HPCA, 2016)

Characterizing memory bottlenecks in GPGPU workloads. - Saumay Dublish; Vijay Nagarajan; Nigel P. Topham (IISWC, 2016)

Automatic configuration of ROS applications for near-optimal performance. - José Cano 001; Alejandro Bordallo; Vijay Nagarajan; Subramanian Ramamoorthy; Sethu Vijayakumar (IROS, 2016)

C3D: Mitigating the NUMA bottleneck via coherent DRAM caches. - Cheng-Chieh Huang; Rakesh Kumar 003; Marco Elver; Boris Grot; Vijay Nagarajan (MICRO, 2016)

Task Variant Allocation in Distributed Robotics. - José Cano 001; David Robert White; Alejandro Bordallo; Ciaran McCreesh; Patrick Prosser; Jeremy Singer; Vijay Nagarajan (Robotics: Science and Systems, 2016)

DCA: a DRAM-cache-aware DRAM controller. - Cheng-Chieh Huang; Vijay Nagarajan; Arpit Joshi (SC, 2016)

Cooperative Caching for GPUs. - Saumay Dublish; Vijay Nagarajan; Nigel P. Topham (ACM Trans. Archit. Code Optim., 2016)

Fence Placement for Legacy Data-Race-Free Programs via Synchronization Read Detection. - Andrew J. McPherson; Vijay Nagarajan; Susmit Sarkar; Marcelo Cintra (ACM Trans. Archit. Code Optim., 2016)

Verification of a lazy cache coherence protocol against a weak memory model. - Christopher J. Banks; Marco Elver; Ruth Hoffmann; Susmit Sarkar; Paul B. Jackson; Vijay Nagarajan (FMCAD, 2017)

Boomerang: A Metadata-Free Architecture for Control Flow Delivery. - Rakesh Kumar 003; Cheng-Chieh Huang; Boris Grot; Vijay Nagarajan (HPCA, 2017)

ATOM: Atomic Durability in Non-volatile Memory through Hardware Logging. - Arpit Joshi; Vijay Nagarajan; Stratis Viglas; Marcelo Cintra (HPCA, 2017)

Evaluating and mitigating bandwidth bottlenecks across the memory hierarchy in GPUs. - Saumay Dublish; Vijay Nagarajan; Nigel P. Topham (ISPASS, 2017)

Blasting through the Front-End Bottleneck with Shotgun. - Rakesh Kumar 003; Boris Grot; Vijay Nagarajan (ASPLOS, 2018)

VerC3: A library for explicit state synthesis of concurrent systems. - Marco Elver; Christopher J. Banks; Paul B. Jackson; Vijay Nagarajan (DATE, 2018)

Scale-out ccNUMA: exploiting skew with strongly consistent caching. - Vasilis Gavrielatos; Antonios Katsarakis; Arpit Joshi; Nicolai Oswald; Boris Grot; Vijay Nagarajan (EuroSys, 2018)

Automatic Parameter Tuning of Motion Planning Algorithms. - José Cano 001; Yiming Yang; Bruno Bodin; Vijay Nagarajan; Michael F. P. O'Boyle (IROS, 2018)

DHTM: Durable Hardware Transactional Memory. - Arpit Joshi; Vijay Nagarajan; Marcelo Cintra; Stratis Viglas (ISCA, 2018)

ProtoGen: Automatically Generating Directory Cache Coherence Protocols from Atomic Specifications. - Nicolai Oswald; Vijay Nagarajan; Daniel J. Sorin (ISCA, 2018)

Solving the task variant allocation problem in distributed robotics. - José Cano 001; David Robert White; Alejandro Bordallo; Ciaran McCreesh; Anna Lito Michala; Jeremy Singer; Vijay Nagarajan (Auton. Robots, 2018)

Poise: Balancing Thread-Level Parallelism and Memory System Performance in GPUs Using Machine Learning. - Saumay Dublish; Vijay Nagarajan; Nigel P. Topham (HPCA, 2019)

Lazy Release Persistency. - Mahesh Dananjaya; Vasilis Gavrielatos; Arpit Joshi; Vijay Nagarajan (ASPLOS, 2020)

Hermes: A Fast, Fault-Tolerant and Linearizable Replication Protocol. - Antonios Katsarakis; Vasilis Gavrielatos; M. R. Siavash Katebzadeh; Arpit Joshi; Aleksandar Dragojevic; Boris Grot; Vijay Nagarajan (ASPLOS, 2020)

HieraGen: Automated Generation of Concurrent, Hierarchical Cache Coherence Protocols. - Nicolai Oswald; Vijay Nagarajan; Daniel J. Sorin (ISCA, 2020)

Kite: efficient and available release consistency for the datacenter. - Vasilis Gavrielatos; Antonios Katsarakis; Vijay Nagarajan; Boris Grot; Arpit Joshi (PPoPP, 2020)

A Primer on Memory Consistency and Cache Coherence, Second Edition - Vijay Nagarajan; Daniel J. Sorin; Mark D. Hill; David A. Wood 001 (A Primer on Memory Consistency and Cache Coherence (2nd Ed.), 2020)

Odyssey: the impact of modern hardware on strongly-consistent replication protocols. - Vasilis Gavrielatos; Antonios Katsarakis; Vijay Nagarajan (EuroSys, 2021)

Towards the Synthesis of Coherence/Replication Protocols from Consistency Models via Real-Time Orderings. - Vasilis Gavrielatos; Vijay Nagarajan; Panagiota Fatourou (PaPoC@EuroSys, 2021)

Dvé: Improving DRAM Reliability and Performance On-Demand via Coherent Replication. - Adarsh Patil 002; Vijay Nagarajan; Rajeev Balasubramonian; Nicolai Oswald (ISCA, 2021)

Avocado: A Secure In-Memory Distributed Storage System. - Maurice Bailleu; Dimitra Giantsidi; Vasilis Gavrielatos; Do Le Quoc; Vijay Nagarajan; Pramod Bhatotia (USENIX ATC, 2021)

Extending Classic Paxos for High-performance Read-Modify-Write Registers. - Vasilis Gavrielatos; Antonios Katsarakis; Vijay Nagarajan (CoRR, 2021)

Āpta: Fault-tolerant object-granular CXL disaggregated memory for accelerating FaaS. - Adarsh Patil 002; Vijay Nagarajan; Nikos Nikoleris; Nicolai Oswald (DSN, 2023)

HeteroGen: Automatic Synthesis of Heterogeneous Cache Coherence Protocols. - Nicolai Oswald; Vijay Nagarajan; Daniel J. Sorin; Vasilis Gavrielatos; Theo X. Olausson; Reece Carr (IEEE Micro, 2023)

Compound Memory Models. - Andrés Goens; Soham Chakraborty 001; Susmit Sarkar; Sukarn Agarwal; Nicolai Oswald; Vijay Nagarajan (Proc. ACM Program. Lang., 2023)

PipeGen: Automated Transformation of a Single-Core Pipeline into a Multicore Pipeline for a Given Memory Consistency Model. - An Qi Zhang; Andrés Goens; Nicolai Oswald; Tobias Grosser; Daniel J. Sorin; Vijay Nagarajan (PACT, 2024)

Determining the Minimum Number of Virtual Networks for Different Coherence Protocols. - Weihang Li; Andrés Goens; Nicolai Oswald; Vijay Nagarajan; Daniel J. Sorin (ISCA, 2024)

Fast, Highly Available, and Recoverable Transactions on Disaggregated Data Stores. - Mahesh Dananjaya; Vasilis Gavrielatos; Antonios Katsarakis; Nikos Ntarmos; Vijay Nagarajan (EDBT, 2025)

Stop Taking the Scenic Route: the Shortest Distance Between the CPU and the NIC is MMIO. - Wei Siew Liew; Md Ashfaqur Rahaman; James McMahon; Ryan Stutsman; Vijay Nagarajan (HotOS, 2025)