Analysis & characterization of dual tail current based dynamic latch comparator with modified SR latch using 90nm technology. - Vijay Savani; N. M. Devashrayee (VDAT, 2015)

Design and analysis of low-power high-speed shared charge reset technique based dynamic latch comparator. - Vijay Savani; N. M. Devashrayee (Microelectron. J., 2018)

Design and Analysis of Low-Voltage and Low-Power 19T FinFET-TGDI-Based Hybrid Full Adders. - Parthiv Bhau; Vijay Savani (J. Circuits Syst. Comput., 2024)