A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique. - Manisha Pattanaik; Shashank Parashar; Chaudhry Indra Kumar; Akanksha Chouhan; Vikas Mahor (ISED, 2011)

A Process Variation Tolerant Low Contention Keeper Design for Wide Fan-In Dynamic OR Gate. - Vikas Mahor; Akanksha Chouhan; Manisha Pattanaik (ISED, 2012)

Low Leakage and Highly Noise Immune FinFET-Based Wide Fan-In Dynamic Logic Design. - Vikas Mahor; Manisha Pattanaik (J. Circuits Syst. Comput., 2015)

Novel NBTI Aware Approach for Low Power FinFET Based Wide Fan-In Domino Logic. - Vikas Mahor; Manisha Pattanaik (J. Low Power Electron., 2015)

Low Stand-By Power and Process Variation Tolerant FinFET Based SRAM Cell. - Akanksha Bhadoria; Mukesh Chaturvedi; Vikas Mahor; Manisha Pattanaik (iNIS, 2016)

FinFET-Based Low Power Address Decoder under Process Variation. - Mukesh Chaturvedi; Akanksha Bhadoria; Vikas Mahor; Manisha Pattanaik (iNIS, 2016)

Novel Ultra Low Leakage FinFET Based SRAM Cell. - Vivek Kumar; Vikas Mahor; Manisha Pattanaik (iNIS, 2016)

An Aging-Aware Reliable FinFET-Based Low-Power 32-Word ( times ) 32-bit Register File. - Vikas Mahor; Manisha Pattanaik (Circuits Syst. Signal Process., 2017)

A Highly Accurate Fire Detection Method Using Discriminate Method. - Shubhranil Kundu; Vikas Mahor; Rekha Gupta (ICACCI, 2018)

A State-of-the-Art Current Mirror-Based Reliable Wide Fan-in FinFET Domino OR Gate Design. - Vikas Mahor; Manisha Pattanaik (Circuits Syst. Signal Process., 2018)

Image Filtering with Iterative Wavelet Transform Based Compression. - Vikas Mahor; Srishti Agrawal; Rekha Gupta (ICACDS (2), 2019)