Recent progress in redox-based resistive switching. - Rainer Waser; Stephan Menzel; Vikas Rana (ISCAS, 2012)

Lowering forming voltage and forming-free behavior of Ta2O5 ReRAM devices. - Wonjoo Kim; Dirk J. Wouters; Stephan Menzel; Christian Rodenbucher; Rainer Waser; Vikas Rana (ESSDERC, 2016)

-1.1V to +1.1V 3: 1 Power Switch Architecture for Controlling Body Bias of SRAM Array in 28nm UTBB CMOS FDSOI. - Amit Chhabra; Vikas Rana (VLSID, 2016)

A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications. - Marco Pasotti; Marcella Carissimi; Chantal Auricchio; Donatella Brambilla; Emanuela Calvetti; Laura Capecchi; Luigi Croce; Daniele Gallinari; Cristina Mazzaglia; Vikas Rana; Riccardo Zurla; Alessandro Cabrini; et al. (ESSCIRC, 2017)

A 10 MHz, 73 ppm/°C, 84 µW PVT Compensated Ring Oscillator. - Vivek Tyagi; Mohammad S. Hashmi; Ganesh Raj; Vikas Rana (VDAT, 2017)

A 10 MHz, 42 ppm/ °C, 69 μW PVT Compensated Latch Based Oscillator in BCD9S Technology for PCM. - Vivek Tyagi; Mohammad S. Hashmi; Ganesh Raj; Vikas Rana (VDAT, 2017)

Single charge-pump generating high positive and negative voltages driving common load. - Vikas Rana; Marco Pasotti; F. Desantis (VLSI-SoC, 2017)

Switched Capacitor based Area Efficient Positive and Negative Voltage Multiplier. - Vikas Rana (APCCAS, 2018)

Switched Capacitor based High Positive and Negative Voltage Charge-pump using Sample and Hold technique. - Vikas Rana; Abhishek Mittal (APCCAS, 2018)

Area Efficient NMOS Based Positive and Negative Voltage Multiplier. - Vikas Rana (ISVLSI, 2018)

CMOS Oscillator Having Stable Frequency with Process, Temperature and Voltage Variation. - Vikas Rana (VLSID, 2018)

A 32-KB ePCM for Real-Time Data Processing in Automotive and Smart Power Applications. - Marco Pasotti; Riccardo Zurla; Marcella Carissimi; Chantal Auricchio; Donatella Brambilla; Emanuela Calvetti; Laura Capecchi; Luigi Croce; Daniele Gallinari; Cristina Mazzaglia; Vikas Rana; Alessandro Cabrini; et al. (IEEE J. Solid State Circuits, 2018)

Row decoder for embedded Phase Change Memory using low voltage transistors. - Vikas Rana; Marco Pasotti; Marcella Carissimi (Microelectron. J., 2018)

Stress Relaxed Multiple Output High-Voltage Level Shifter. - Vikas Rana; Rohan Sinha (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications. - Marcella Carissimi; Ritesh Mukherjee; Vivek Tyagi; Fabio Disegni; Davide Manfrè; Cesare Torti; Daniele Gallinari; Sandro Rossi; Andrea Gambero; Donatella Brambilla; Paola Zuliani; Riccardo Zurla; et al. (ESSCIRC, 2019)

Current DAC Based -40dB PSRR Configurable Output LDO in BCD Technology. - Vivek Tyagi; Vikas Rana; Laura Capecchi; Marcella Carissimi; Riccardo Zurla; Marco Pasotti (VLSID, 2019)

A Compact Model for the Electroforming Process of Memristive Devices. - Camilla La Torre; Andreas Kindsmüller; Seokki Son; Rainer Waser; Vikas Rana; Stephan Menzel (ECCTD, 2020)

A 800MHz, O.21pJ, 1.2V to 6V Level Shifter Using Thin Gate Oxide Devices in 65nm LSTP. - Prakhar Shukla; Prabhat Singh; Tushar Maheshwari; Anuj Grover; Vikas Rana (ICECS, 2020)

Switched Capacitor Based Area Efficient Voltage Quadruple for High Pumping Efficiency. - Vikas Rana; Shivam Kalla (SoCC, 2020)

Power Efficient Sense Amplifier For Emerging Non Volatile Memories. - Vivek Tyagi; Vikas Rana; Laura Capecchi; Marcella Carissimi; Marco Pasotti (VLSID, 2020)

Intelligent patient monitoring for proactive alerting of key personnel in intensive care: A single-center study. - Vikas Rana; Teddy Le Nguyen; Veera Raghava; Prahlad G. Menon (EMBC, 2021)

System Theory Enables a Deep Exploration of ReRAM Cells' Switching Phenomena. - Alon Ascoli; Ronald Tetzlaff; Stephan Menzel; Vikas Rana (ICECS, 2021)

50x Endurance Improvement in TaOx RRAM by Extrinsic Doping. - Tim Kempen; Rainer Waser; Vikas Rana (IMW, 2021)

Implementation of Multinary Łukasiewicz Logic Using Memristive Devices. - Christopher Bengel; Anne Siemon; Vikas Rana; Stephan Menzel (ISCAS, 2021)

Tuning the Memory Window of TaOx ReRAM Using the RF Sputtering Power. - Wonjoo Kim; Dirk J. Wouters; Rainer Waser; Vikas Rana (ISCAS, 2021)

Negative Voltage Generator and Current DAC Based Regulator For Flash Memory. - Vivek Tyagi; Shivam Kalla; Vikas Rana (VLSID, 2021)

Adaptive Forward Body Bias Voltage Generator. - Vivek Tyagi; Vikas Rana (VLSID, 2021)

NEUROTEC I: Neuro-inspired Artificial Intelligence Technologies for the Electronics of the Future. - Melvin Galicia; Stephan Menzel; Farhad Merchant; Maximilian Müller; Hsin-Yu Chen; Qing-Tai Zhao; Felix Cüppers; Abdur R. Jalil; Qi Shu; Peter Schüffelgen; Gregor Mussler; Carsten Funck; et al. (DATE, 2022)

NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories. - Felix Staudigl; Hazem Al Indari; Daniel Schön; Dominik Sisejkovic; Farhad Merchant; Jan Moritz Joseph; Vikas Rana; Stephan Menzel; Rainer Leupers (DATE, 2022)

Experimental and Theoretical Analysis of Stateful Logic in Passive and Active Crossbar Arrays for Computation-in-Memory. - Christopher Bengel; Stefan Wiefels; Vikas Rana; Hsin-Yu Chen; Qing-Tai Zhao; Rainer Waser; Henriette Padberg; Fengben Xi; Stephan Menzel (ISCAS, 2022)

Performance Analysis of Memristive-CNN based on a VCM Device Model. - Yongmin Wang; Alon Ascoli; Ronald Tetzlaff; Vikas Rana; Stephan Menzel (ISCAS, 2022)

Toward Simplified Physics-Based Memristor Modeling of Valence Change Mechanism Devices. - Vasileios G. Ntinas; Alon Ascoli; Ioannis Messaris; Yongmin Wang; Vikas Rana; Stephan Menzel; Ronald Tetzlaff (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Design and Analysis of Isolated Voltage-Mode Memristor Cellular Nonlinear Network Cells. - Vasileios G. Ntinas; Yongmin Wang; Ahmet Samil Demirkol; Ioannis Messaris; Vikas Rana; Stephan Menzel; Alon Ascoli; Ronald Tetzlaff (ISCAS, 2023)

Exploration of Bistable Oscillatory Dynamics in a Memristor from Forschungszentrum Jülich. - Nicolas Schmitt; Alon Ascoli; Ioannis Messaris; Ahmet Samil Demirkol; Vasileios G. Ntinas; Dimitrios A. Prousalis; Ronald Tetzlaff; Spyridon Nikolaidis 001; Stephan Menzel; Vikas Rana (MOCAST, 2023)

Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS Technologies. - Simranjeet Singh; Elmira Moussavi; Christopher Bengel; Sachin B. Patkar; Rainer Waser; Rainer Leupers; Vikas Rana; Vivek Pachauri; Stephan Menzel; Farhad Merchant (NANOARCH, 2023)

Experimental Verification of Uncoupled Memristive Cellular Nonlinear Network by Processing the EDGE Detection Task. - Yongmin Wang; Kristoffer Schnieders; Vasileios G. Ntinas; Alon Ascoli; Felix Cüppers; Susanne Hoffmann-Eifert; Stefan Wiefels; Ronald Tetzlaff; Vikas Rana; Stephan Menzel (NANOARCH, 2023)

Finite State Automata Design using 1T1R ReRAM Crossbar. - Simranjeet Singh; Omar Ghazal; Chandan Kumar Jha 001; Vikas Rana; Rolf Drechsler; Rishad A. Shafik; Alex Yakovlev; Sachin B. Patkar; Farhad Merchant (NEWCAS, 2023)

Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar. - Simranjeet Singh; Furqan Zahoor; Gokulnath Rajendran; Vikas Rana; Sachin B. Patkar; Anupam Chattopadhyay; Farhad Merchant (NEWCAS, 2023)

A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation. - Vasileios G. Ntinas; Dharmik Patel; Yongmin Wang; Ioannis Messaris; Vikas Rana; Stephan Menzel; Alon Ascoli; Ronald Tetzlaff (SMACD, 2023)

PR-PUF: A Reconfigurable Strong RRAM PUF. - Gokulnath Rajendran; Furqan Zahoor; Simranjeet Singh; Farhad Merchant; Vikas Rana; Anupam Chattopadhyay (VLSI-SoC, 2023)

A Study of the Electroforming Process in 1T1R Memory Arrays. - Seokki Son; Camilla La Torre; Andreas Kindsmüller; Vikas Rana; Stephan Menzel (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style. - Simranjeet Singh; Chandan Kumar Jha 001; Ankit Bende; Phrangboklang Lyngton Thangkhiew; Vikas Rana; Sachin B. Patkar; Rolf Drechsler; Farhad Merchant (IEEE Embed. Syst. Lett., 2023)

MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. - Simranjeet Singh; Chandan Kumar Jha 001; Ankit Bende; Vikas Rana; Sachin B. Patkar; Rolf Drechsler; Farhad Merchant (ASPDAC, 2024)

Error Detection and Correction Codes for Safe In-Memory Computations. - Luca Parrini; Taha Soliman; Benjamin Hettwer; Jan Micha Borrmann; Simranjeet Singh; Ankit Bende; Vikas Rana; Farhad Merchant; Norbert Wehn (ETS, 2024)

Experimental Evidence for Local Fading Memory Effects in TaOx ReRAM Cells. - Nicolas Schmitt; Ioannis Messaris; Ahmet Samil Demirkol; Vasileios G. Ntinas; Dimitrios A. Prousalis; Ronald Tetzlaff; Alon Ascoli; Fernando Corinto; Marco Gilli; S. Zhang; Stephan Menzel; Vikas Rana; et al. (MetroXRAINE, 2024)

In-Memory Mirroring: Cloning Without Reading. - Simranjeet Singh; Ankit Bende; Chandan Kumar Jha 001; Vikas Rana; Rolf Drechsler; Sachin B. Patkar; Farhad Merchant (VLSI-SoC, 2024)

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. - Ankit Bende; Simranjeet Singh; Chandan Kumar Jha 001; Tim Kempen; Felix Cüppers; Christopher Bengel; Andre Zambanini; Dennis Nielinger; Sachin B. Patkar; Rolf Drechsler; Rainer Waser; Farhad Merchant; et al. (VLSID, 2024)

Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. - Gokulnath Rajendran; Furqan Zahoor; Sidhaant Sachin Thakker; Simranjeet Singh; Farhad Merchant; Vikas Rana; Anupam Chattopadhyay (VLSID, 2024)

Employing Vector Field Techniques on the Analysis of Memristor Cellular Nonlinear Networks Cell Dynamics. - Chandan Singh; Vasileios G. Ntinas; Dimitrios A. Prousalis; Yongmin Wang; Ahmet Samil Demirkol; Ioannis Messaris; Vikas Rana; Stephan Menzel; Alon Ascoli; Ronald Tetzlaff (CoRR, 2024)

Dependable Neuromorphic Computing-in-Memory Architectures. - Farhad Merchant; Ankit Bende; Markus Fritscher; Shahar Kvatinsky; Simranjeet Singh; Vikas Rana; Regina Dittmann; Keerthi Dorai Swamy Reddy; Christian Wenger; Fouwad Jamil Mir; Mottaqiallah Taouil; Manil Dev Gomony; et al. (ETS, 2025)

Live Demonstration: 4 × 4 Memristive Cellular Nonlinear Network in EDGE detection operation. - Yongmin Wang; Kristoffer Schnieders; Siyuan Jia; Vasileios Ntinas; Gennadiy Gvozdev; Felix Cüppers; Susanne Hoffmann-Eifert; Alon Ascoli; Ronald Tetzlaff; Stefan Wiefels; Vikas Rana; Stephan Menzel (ISCAS, 2025)

A Comprehensive Compact Model for Multilevel Switching in TaOx-Based Memristive 1T-1R Cells. - Seokki Son; Ankit Bende; Daniel Schön; Rana Walied Ahmad; Dennis Nielinger; Vikas Rana; Stephan Menzel (IEEE Access, 2025)