Balancing Performance and Reliability in the Memory Hierarchy. - Hossein Asadi 001; Vilas Sridharan; Mehdi Baradaran Tahoori; David R. Kaeli (ISPASS, 2005)

Vulnerability analysis of L2 cache elements to single event upsets. - Hossein Asadi 001; Vilas Sridharan; Mehdi Baradaran Tahoori; David R. Kaeli (DATE, 2006)

Reducing Data Cache Susceptibility to Soft Errors. - Vilas Sridharan; Hossein Asadi 001; Mehdi Baradaran Tahoori; David R. Kaeli (IEEE Trans. Dependable Secur. Comput., 2006)

Quantifying software vulnerability. - Vilas Sridharan; David R. Kaeli (WREFT@CF, 2008)

Eliminating microarchitectural dependency from Architectural Vulnerability. - Vilas Sridharan; David R. Kaeli (HPCA, 2009)

Using hardware vulnerability factors to enhance AVF analysis. - Vilas Sridharan; David R. Kaeli (ISCA, 2010)

A study of DRAM failures in the field. - Vilas Sridharan; Dean Liberty (SC, 2012)

Assessing the impact of hard faults in performance components of modern microprocessors. - Nikos Foutris; Dimitris Gizopoulos; John Kalamatianos; Vilas Sridharan (ICCD, 2013)

Measuring the performance impact of permanent faults in modern microprocessor architectures. - Nikos Foutris; Dimitris Gizopoulos; John Kalamatianos; Vilas Sridharan (IOLTS, 2013)

Resilient die-stacked DRAM caches. - Jaewoong Sim; Gabriel H. Loh; Vilas Sridharan; Mike O'Connor (ISCA, 2013)

Analyzing Reliability of Memory Sub-systems with Double-Chipkill Detect/Correct. - Xun Jian 002; Nathan DeBardeleben; Sean Blanchard; Vilas Sridharan; Rakesh Kumar 002 (PRDC, 2013)

Low-power, low-storage-overhead chipkill correct via multi-line error correction. - Xun Jian 002; Henry Duwe; John Sartori; Vilas Sridharan; Rakesh Kumar 002 (SC, 2013)

Feng shui of supercomputer memory: positional effects in DRAM and SRAM faults. - Vilas Sridharan; Jon Stearley; Nathan DeBardeleben; Sean Blanchard; Sudhanva Gurumurthi (SC, 2013)

Real-world design and evaluation of compiler-managed GPU redundant multithreading. - Jack Wadden; Alexander Lyashevsky; Sudhanva Gurumurthi; Vilas Sridharan; Kevin Skadron (ISCA, 2014)

Calculating Architectural Vulnerability Factors for Spatial Multi-Bit Transient Faults. - Mark Wilkening; Vilas Sridharan; Si Li; Fritz Previlon; Sudhanva Gurumurthi; David R. Kaeli (MICRO, 2014)

A Configurable and Strong RAS Solution for Die-Stacked DRAM Caches. - Jaewoong Sim; Gabriel H. Loh; Vilas Sridharan; Mike O'Connor (IEEE Micro, 2014)

Memory Errors in Modern Systems: The Good, The Bad, and The Ugly. - Vilas Sridharan; Nathan DeBardeleben; Sean Blanchard; Kurt B. Ferreira; Jon Stearley; John Shalf; Sudhanva Gurumurthi (ASPLOS, 2015)

Improving DRAM Fault Characterization through Machine Learning. - Elisabeth Baseman; Nathan DeBardeleben; Kurt B. Ferreira; Scott Levy; Steven Raasch; Vilas Sridharan; Taniya Siddiqua; Qiang Guan (DSN Workshops, 2016)

Parity Helix: Efficient protection for single-dimensional faults in multi-dimensional memory systems. - Xun Jian 002; Vilas Sridharan; Rakesh Kumar 002 (HPCA, 2016)

XED: Exposing On-Die Error Detection Information for Strong Memory Reliability. - Prashant J. Nair; Vilas Sridharan; Moinuddin K. Qureshi (ISCA, 2016)

Reliability and Performance Trade-off Study of Heterogeneous Memories. - Manish Gupta 010; David Roberts; Mitesh R. Meswani; Vilas Sridharan; Dean M. Tullsen; Rajesh K. Gupta 001 (MEMSYS, 2016)

Faults in data prefetchers: Performance degradation and variability. - Nikos Foutris; Athanasios Chatzidimitriou; Dimitris Gizopoulos; John Kalamatianos; Vilas Sridharan (VTS, 2016)

Compiler Techniques to Reduce the Synchronization Overhead of GPU Redundant Multithreading. - Manish Gupta 010; Daniel Lowell; John Kalamatianos; Steven Raasch; Vilas Sridharan; Dean M. Tullsen; Rajesh K. Gupta 001 (DAC, 2017)

Lifetime memory reliability data from the field. - Taniya Siddiqua; Vilas Sridharan; Steven E. Raasch; Nathan DeBardeleben; Kurt B. Ferreira; Scott Levy; Elisabeth Baseman; Qiang Guan (DFT, 2017)

Automating DRAM Fault Mitigation By Learning From Experience. - Elisabeth Baseman; Nathan DeBardeleben; Kurt B. Ferreira; Vilas Sridharan; Taniya Siddiqua; Olena Tkachenko (DSN Workshops, 2017)

Design and Analysis of an APU for Exascale Computing. - Thiruvengadam Vijayaraghavan; Yasuko Eckert; Gabriel H. Loh; Michael J. Schulte; Mike Ignatowski; Bradford M. Beckmann; William C. Brantley; Joseph L. Greathouse; Wei Huang 004; Arun Karunanithi; Onur Kayiran; Mitesh R. Meswani; et al. (HPCA, 2017)

Physics-Informed Machine Learning for DRAM Error Modeling. - Elisabeth Baseman; Nathan DeBardeleben; Sean Blanchard; Juston S. Moore; Olena Tkachenko; Kurt B. Ferreira; Taniya Siddiqua; Vilas Sridharan (DFT, 2018)

Evaluating the Resilience of Parallel Applications. - Mark Wilkening; Fritz Previlon; David R. Kaeli; Sudhanva Gurumurthi; Steven Raasch; Vilas Sridharan (DFT, 2018)

Reliability-Aware Data Placement for Heterogeneous Memory Architecture. - Manish Gupta 010; Vilas Sridharan; David Roberts; Andreas Prodromou; Ashish Venkat; Dean M. Tullsen; Rajesh K. Gupta 001 (HPCA, 2018)

Nonblocking Memory Refresh. - Kate Nguyen; Kehan Lyu; Xianze Meng; Vilas Sridharan; Xun Jian 002 (ISCA, 2018)

Exploring and Optimizing Chipkill-Correct for Persistent Memory Based on High-Density NVRAMs. - Da Zhang 004; Vilas Sridharan; Xun Jian 002 (MICRO, 2018)

Lessons learned from memory errors observed over the lifetime of Cielo. - Scott Levy; Kurt B. Ferreira; Nathan DeBardeleben; Taniya Siddiqua; Vilas Sridharan; Elisabeth Baseman (SC, 2018)

Nonblocking DRAM Refresh. - Kate Nguyen; Kehan Lyu; Xianze Meng; Vilas Sridharan; Xun Jian 002 (IEEE Micro, 2019)

Soteria: Towards Resilient Integrity-Protected and Encrypted Non-Volatile Memories. - Kazi Abu Zubair; Sudhanva Gurumurthi; Vilas Sridharan; Amro Awad (MICRO, 2021)

HBM3 RAS: Enhancing Resilience at Scale. - Sudhanva Gurumurthi; Kijun Lee; Munseon Jang; Vilas Sridharan; Aaron Nygren; Yesin Ryu; Kyomin Sohn; Taekyun Kim; Hoeju Chung (IEEE Comput. Archit. Lett., 2021)

Reliability, Availability, and Serviceability Challenges for Heterogeneous System Design. - Majed Valad Beigi; Sudhanva Gurumurthi; Vilas Sridharan (IRPS, 2022)

A Novel Protection Technique for Embedded Memories with Optimized PPA. - Costas Argyrides; Vilas Sridharan; Hayk Danoyan; Gurgen Harutyunyan; Yervant Zorian (ITC, 2022)

Innovative Practices Track: What's Next for Automotive: Where and How to Improve Field Test and Enhance SoC Safety. - Minqiang Peng; Youfa Wu; Jialiang Li; Alex Yu; Grigor Tshagharyan; Costas Argyrides; Vilas Sridharan; Gurgen Harutyunyan; Yervant Zorian; Nilanjan Mukherjee (VTS, 2022)

A Systematic Study of DDR4 DRAM Faults in the Field. - Majed Valad Beigi; Yi Cao; Sudhanva Gurumurthi; Charles Recchia; Andrew C. Walton; Vilas Sridharan (HPCA, 2023)

A Research Retrospective on AMD's Exascale Computing Journey. - Gabriel H. Loh; Michael J. Schulte; Mike Ignatowski; Vignesh Adhinarayanan; Shaizeen Aga; Derrick Aguren; Varun Agrawal; Ashwin M. Aji; Johnathan Alsop; Paul T. Bauman; Bradford M. Beckmann; Majed Valad Beigi; et al. (ISCA, 2023)

DelayAVF: Calculating Architectural Vulnerability Factors for Delay Faults. - Peter W. Deutsch; Vincent Quentin Ulitzsch; Sudhanva Gurumurthi; Vilas Sridharan; Joel S. Emer; Mengjia Yan 001 (MICRO, 2024)

Corrigendum to: A Systematic Study of DDR4 DRAM Faults in the Field. - Majed Valad Beigi; Yi Cao; Sudhanva Gurumurthi; Charles Recchia; Andrew C. Walton; Vilas Sridharan (CoRR, 2024)

DDR5 DRAM Faults in the Field. - Majed Valad Beigi; Yi Cao; Grace Tsai; Sudhanva Gurumurthi; Vilas Sridharan (DSN-S, 2025)