Enabling Concurrent Clock and Power Gating in 32 Bit ROM. - Harekrishna Kumar; Anjan Kumar; Vinay Kumar Deolia (ICCCNT, 2018)

Analysis and design of tent map interleaver for interleave division multiple access scheme. - Aasheesh Shukla; Vinay Kumar Deolia (Int. J. Wirel. Mob. Comput., 2018)

Investigation of Fractional-Order Nonlinear PID Controller for Three-link Robotic Manipulator System. - Sweta; Jitendra Kumar; Vinay Kumar Deolia (ICCCNT, 2023)

Computational Analysis of Uplink NOMA and OMA for 5G Applications: An Optimized Network. - Shelesh Krishna Saraswat; Vinay Kumar Deolia; Aasheesh Shukla (Informatica (Slovenia), 2023)