Reconfigurable BDD based quantum circuits. - Soumya Eachempati; Vinay Saripalli; Narayanan Vijaykrishnan; Suman Datta (NANOARCH, 2008)

Ultra Low Energy Binary Decision Diagram Circuits Using Few Electron Transistors. - Vinay Saripalli; Vijaykrishnan Narayanan; Suman Datta (NanoNet, 2009)

Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors. - Vinay Saripalli; Vijaykrishnan Narayanan; Suman Datta (VLSI Design, 2010)

Energy-Delay Performance of Nanoscale Transistors Exhibiting Single Electron Behavior and Associated Logic Circuits. - Vinay Saripalli; Lu Liu; Suman Datta; Vijaykrishnan Narayanan (J. Low Power Electron., 2010)

An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores. - Vinay Saripalli; Asit K. Mishra; Suman Datta; Vijaykrishnan Narayanan (DAC, 2011)

Enabling architectural innovations using non-volatile memory. - Vijaykrishnan Narayanan; Vinay Saripalli; Karthik Swaminathan; Ravindhiran Mukundrajan; Guangyu Sun 003; Yuan Xie 001; Suman Datta (ACM Great Lakes Symposium on VLSI, 2011)

Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores. - Karthik Swaminathan; Emre Kultursay; Vinay Saripalli; Vijaykrishnan Narayanan; Mahmut T. Kandemir; Suman Datta (ISLPED, 2011)

Variation-tolerant ultra low-power heterojunction tunnel FET SRAM design. - Vinay Saripalli; Suman Datta; Vijaykrishnan Narayanan; Jaydeep P. Kulkarni (NANOARCH, 2011)

Exploiting Heterogeneity for Energy Efficiency in Chip Multiprocessors. - Vinay Saripalli; Guangyu Sun 003; Asit K. Mishra; Yuan Xie 001; Suman Datta; Vijaykrishnan Narayanan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores. - Emre Kultursay; Karthik Swaminathan; Vinay Saripalli; Vijaykrishnan Narayanan; Mahmut T. Kandemir; Suman Datta (CODES+ISSS, 2012)

Design space exploration of workload-specific last-level caches. - Karthik Swaminathan; Emre Kultursay; Vinay Saripalli; Vijaykrishnan Narayanan; Mahmut T. Kandemir (ISLPED, 2012)

Ultra Low Power Circuit Design Using Tunnel FETs. - Ravindhiran Mukundrajan; Matthew Cotter; Vinay Saripalli; Mary Jane Irwin; Suman Datta; Vijaykrishnan Narayanan (ISVLSI, 2012)

Design of energy-efficient circuits and systems using tunnel field effect transistors. - Ravindhiran Mukundrajan; Matthew Cotter; Sungmin Bae; Vinay Saripalli; Mary Jane Irwin; Suman Datta; Vijaykrishnan Narayanan (IET Circuits Devices Syst., 2013)

Steep-Slope Devices: From Dark to Dim Silicon. - Karthik Swaminathan; Emre Kultursay; Vinay Saripalli; Vijaykrishnan Narayanan; Mahmut T. Kandemir; Suman Datta (IEEE Micro, 2013)

CDLS: Constraint Driven Generative AI Framework for Analog Layout Synthesis. - Prasanth Mangalagiri; Lynn Qian; Farrukh Zafar; Praveen Mosalikanti; Phoebe Chang; Arun Kurian; Vinay Saripalli (DAC, 2024)