A High Speed, Run Time Reconfigurable Image Acquisition processor for a Missile Approach Warning System. - Vinay Sriram; David Kearney (ERSA, 2006)

An Area Time Efficient Field Programmable Mersenne Twister Uniform Random Number Generator. - Vinay Sriram; David Kearney (ERSA, 2006)

High Speed High Fidelity Infrared Scene Simulation Using Reconfigurable Computing. - Vinay Sriram; David Kearney (FPL, 2006)

A Parallel Area Efficient Kolmogorov Phase Screen Generator Suitable for FPGA Implementation. - Vinay Sriram; David Kearney (DICTA, 2007)

Research Issues in Using Reconfigurable Computing to Accelerate Infrared Simulation. - Vinay Sriram; David Kearney (DICTA, 2007)

A high throughput area time efficient pseudo uniform random number generator based on the TT800 algorithm. - Vinay Sriram; David Kearney (FPL, 2007)

A FPGA Implementation of Variable Kernel Convolution. - Vinay Sriram; David Kearney (PDCAT, 2007)

Implementing a Phase Screen Generator in Hardware. - Vinay Sriram; David Kearney (PDCAT, 2007)

High Throughput Multi-port MT19937 Uniform Random Number Generator. - Vinay Sriram; David Kearney (PDCAT, 2007)

Multiple parallel FPGA implementations of a Kolmogorov phase screen generator. - Vinay Sriram; David Kearney (J. Real Time Image Process., 2008)

An FPGA Implementation of a Parallelized MT19937 Uniform Random Number Generator. - Vinay Sriram; David Kearney (EURASIP J. Embed. Syst., 2009)

FPGA Supercomputing Platforms, Architectures, and Techniques for Accelerating Computationally Complex Algorithms. - Vinay Sriram; Miriam Leeser (EURASIP J. Embed. Syst., 2009)

Towards an embedded biologically-inspired machine vision processor. - Vinay Sriram; David D. Cox; Kuen Hung Tsoi; Wayne Luk (FPT, 2010)

CloudEx: a fair-access financial exchange in the cloud. - Ahmad Ghalayini; Jinkun Geng; Vighnesh Sachidananda; Vinay Sriram; Yilong Geng; Balaji Prabhakar; Mendel Rosenblum; Anirudh Sivaraman (HotOS, 2021)