Vincent E. Dorgan

According to our database, Vincent E. Dorgan authored at least 4 papers between 2014 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

A 0.9-μm² 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming.

Zhanping Chen, Sarvesh H. Kulkarni, Vincent E. Dorgan, Salil Manohar Rajarshi, Lei Jiang, Uddalak Bhattacharya

IEEE J. Solid State Circuits, 2017

2016

A 0.9um² 1T1R bit cell in 14nm SoC process for metal-fuse OTP array with hierarchical bitline, bit level redundancy, and power gating.

Zhanping Chen, Sarvesh H. Kulkarni, Vincent E. Dorgan, Uddalak Bhattacharya, Kevin Zhang

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2014

High-field transport in two-dimensional graphene and molybdenum disulfide

Vincent E. Dorgan

PhD thesis, 2014

Energy efficiency and conversion in 1D and 2D electronics.

Eric Pop, Chris English, Feng Xiong, Feifei Lian, Andrey Serov, Zuanyi Li, Sharnali Islam, Vincent E. Dorgan

Proceedings of the 44th European Solid State Device Research Conference, 2014