Breaking Hitag 2 Revisited. - Vincent Immler (SPACE, 2012)

Early Propagation and Imbalanced Routing, How to Diminish in FPGAs. - Amir Moradi 001; Vincent Immler (IACR Cryptol. ePrint Arch., 2014)

Practical Aspects of Quantization and Tamper-Sensitivity for Physically Obfuscated Keys. - Vincent Immler; Maxim Hennig; Ludwig Kürzinger; Georg Sigl (CS2@HiPEAC, 2016)

Take a moment and have some t: Hypothesis testing on raw PUF data. - Vincent Immler; Matthias Hiller; Johannes Obermaier; Georg Sigl (HOST, 2017)

Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs. - Vincent Immler; Matthias Hiller; Qinzhi Liu; Andreas Lenz 001; Antonia Wachter-Zeh (IACR Cryptol. ePrint Arch., 2017)

Your Rails Cannot Hide From Localized EM: How Dual-Rail Logic Fails on FPGAs. - Vincent Immler; Robert Specht; Florian Unterstein (IACR Cryptol. ePrint Arch., 2017)

Efficient security zones implementation through hierarchical group key management at NoC-based MPSoCs. - Martha Johanna Sepúlveda; Daniel Flórez; Vincent Immler; Guy Gogniat; Georg Sigl (Microprocess. Microsystems, 2017)

A measurement system for capacitive PUF-based security enclosures. - Johannes Obermaier; Vincent Immler; Matthias Hiller; Georg Sigl (DAC, 2018)

B-TREPID: Batteryless tamper-resistant envelope with a PUF and integrity detection. - Vincent Immler; Johannes Obermaier; Martin König; Matthias Hiller; Georg Sigl (HOST, 2018)

Dividing the threshold: Multi-probe localized EM analysis on threshold implementations. - Robert Specht; Vincent Immler; Florian Unterstein; Johann Heyszl; Georg Sigl (HOST, 2018)

Capacitive Multi-Channel Security Sensor IC for Tamper-Resistant Enclosures. - Elischa Ferres; Vincent Immler; Alexander Utz; Alexander Stanitzki; Reneé Lerch; Rainer Kokozinski (IEEE SENSORS, 2018)

Your rails cannot hide from localized EM: how dual-rail logic fails on FPGAs - extended version. - Vincent Immler; Robert Specht; Florian Unterstein (J. Cryptogr. Eng., 2018)

The Past, Present, and Future of Physical Security Enclosures: From Battery-Backed Monitoring to PUF-Based Inherent Security and Beyond. - Johannes Obermaier; Vincent Immler (J. Hardw. Syst. Secur., 2018)

Side-Channel Analysis of the TERO PUF. - Lars Tebelmann; Michael Pehl; Vincent Immler (IACR Cryptol. ePrint Arch., 2019)

Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs - Extended Version. - Vincent Immler; Matthias Hiller; Qinzhi Liu; Andreas Lenz 001; Antonia Wachter-Zeh (J. Hardw. Syst. Secur., 2019)

Secure Physical Enclosures from Covers with Tamper-Resistance. - Vincent Immler; Johannes Obermaier; Kuan Kuan Ng; Fei Xiang Ke; JinYu Lee; Yak Peng Lim; Wei Koon Oh; Keng Hoong Wee; Georg Sigl (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019)

New Insights to Key Derivation for Tamper-Evident Physical Unclonable Functions. - Vincent Immler; Karthik Uppund (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019)

Higher-Order Alphabet Physical Unclonable Functions: Constructions, Properties, and Applications. - Vincent Immler (2019)

Spatial Context Tree Weighting for Physical Unclonable Functions. - Michael Pehl; Tobias Tretschok; Daniel Becker 008; Vincent Immler (ECCTD, 2020)

Analysis of Arbitrary Waveform Generation for Voltage Glitches. - Stanislav Lyakhov; Vincent Immler (FDTC, 2023)

High-Performance Design Patterns and File Formats for Side-Channel Analysis. - Jonah Bosland; Stefan Ene; Peter Baumgartner 006; Vincent Immler (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

Ultra-Compact and High-Throughput True Random Number Generator for FPGAs. - Gabriel Cojocaru; Vincent Immler (ACM Great Lakes Symposium on VLSI, 2025)

Hardware-Enabled Mechanisms for Verifying Responsible AI Development. - Aidan O'Gara; Gabriel Kulp; Will Hodgkins; James Petrie; Vincent Immler; Aydin Aysu; Kanad Basu; Shivam Bhasin; Stjepan Picek; Ankur Srivastava 001 (CoRR, 2025)