On the Use of Information Redundancy When Designing Secure Chips. - Régis Leveugle; V. Maingot (DDECS, 2006)

Error Detection Code Efficiency for Secure Chips. - Vincent Maingot; Régis Leveugle (ICECS, 2006)

Experimental evaluation of protections against laser-induced faults and consequences on fault modeling. - Régis Leveugle; Abdelaziz Ammari; V. Maingot; E. Teyssou; Pascal Moitrel; Christophe Mourtel; Nathalie Feyt; Jean-Baptiste Rigaud; Assia Tria (DATE, 2007)

Configuration errors analysis in SRAM-based FPGAs: Software tool and practical results. - V. Maingot; Jean Baptiste Ferron; Régis Leveugle; Vincent Pouget; Alexandre Douin (Microelectron. Reliab., 2007)