Exploration of polynomial multiplication algorithms for homomorphic encryption schemes. - Vincent Migliore; Maria Mendez Real; Vianney Lapotre; Arnaud Tisserand; Caroline Fontaine; Guy Gogniat (ReConFig, 2015)

Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm. - Vincent Migliore; Maria Mendez Real; Vianney Lapotre; Arnaud Tisserand; Caroline Fontaine; Guy Gogniat (FPT, 2016)

ALMOS Many-Core Operating System Extension with New Secure-Enable Mechanisms for Dynamic Creation of Secure Zones. - Maria Mendez Real; Vincent Migliore; Vianney Lapotre; Guy Gogniat (PDP, 2016)

Dynamic spatially isolated secure zones for NoC-based many-core accelerators. - Maria Mendez Real; Philipp Wehner; Vincent Migliore; Vianney Lapotre; Diana Göhringer; Guy Gogniat (ReCoSoC, 2016)

MPSoCSim extension: An OVP simulator for the evaluation of cluster-based multi and many-core architectures. - Maria Mendez Real; Philipp Wehner; Jens Rettkowski; Vincent Migliore; Vianney Lapotre; Diana Göhringer; Guy Gogniat (SAMOS, 2016)

Somewhat/Fully Homomorphic Encryption: Implementation Progresses and Challenges. - Guillaume Bonnoron; Caroline Fontaine; Guy Gogniat; Vincent Herbert; Vianney Lapôtre; Vincent Migliore; Adeline Roux-Langlois (C2SI, 2017)

A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm. - Vincent Migliore; Cédric Seguin; Maria Mendez Real; Vianney Lapotre; Arnaud Tisserand; Caroline Fontaine; Guy Gogniat; Russell Tessier (ACM Trans. Embed. Comput. Syst., 2017)

Cybersécurite matérielle et conception de composants dédiés au calcul homomorphe. (Hardware cybersecurity and design of dedicated components for the acceleration of homomorphie encryption schemes). - Vincent Migliore (2017)

Practical Parameters for Somewhat Homomorphic Encryption Schemes on Binary Circuits. - Vincent Migliore; Guillaume Bonnoron; Caroline Fontaine (IEEE Trans. Computers, 2018)

Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm. - Vincent Migliore; Maria Mendez Real; Vianney Lapotre; Arnaud Tisserand; Caroline Fontaine; Guy Gogniat (IEEE Trans. Computers, 2018)

Masking Dilithium: Efficient Implementation and Side-Channel Evaluation. - Vincent Migliore; Benoît Gérard; Mehdi Tibouchi; Pierre-Alain Fouque (IACR Cryptol. ePrint Arch., 2019)

Multi-Locking and Perfect Argument Order: Two Major Improvements of Attribute-Based Encryption (Long Paper). - Cyrius Nugier; Remi Adelin; Vincent Migliore; Eric Alata (IACR Cryptol. ePrint Arch., 2019)

REHAD: Using Low-Frequency Reconfigurable Hardware for Cache Side-Channel Attacks Detection. - Yuxiao Mao; Vincent Migliore; Vincent Nicomette (EuroS&P Workshops, 2020)

Hardware-Performance-Counters-based anomaly detection in massively deployed smart industrial devices. - Malcolm Bourdon; Pierre-François Gimenez; Eric Alata; Mohamed Kaâniche; Vincent Migliore; Vincent Nicomette; Youssef Laarouchi (NCA, 2020)

Towards Automating Cryptographic Hardware Implementations: a Case Study of HQC. - Carlos Aguilar Melchor; Jean-Christophe Deneuville; Arnaud Dion; James Howe; Romain Malmain; Vincent Migliore; Mamuri Nawan; Kashif Nawaz (IACR Cryptol. ePrint Arch., 2022)

Facing emerging challenges in connected vehicles: a formally proven, legislation compliant, and post-quantum ready security protocol. - Remi Adelin; Cyrius Nugier; Eric Alata; Vincent Nicomette; Vincent Migliore; Mohamed Kaâniche (J. Comput. Virol. Hacking Tech., 2022)

Acceleration of a Classic McEliece Postquantum Cryptosystem With Cache Processing. - Cyrius Nugier; Vincent Migliore (IEEE Micro, 2024)

PowerSecBench: reveal microarchitectural power leakages using generic RISC-V microbenchmarks. - Mathieu Escouteloup; Vincent Migliore (CF, 2025)

Key Recovery from Side-Channel Power Analysis Attacks on Non-SIMD HQC Decryption. - Nathan Maillet; Cyrius Nugier; Vincent Migliore; Jean-Christophe Deneuville (IACR Cryptol. ePrint Arch., 2025)