Design of Dedicated Reversible Quantum Circuitry for Square Computation. - H. V. Jayashree; Himanshu Thapliyal; Vinod Kumar Agrawal (VLSID, 2014)

Design of optimized reversible multiplier for high speed DSP application. - A. N. Nagamani; H. Vishnu Prasad; Rajendra S. Hathwar; Vinod Kumar Agrawal (ICICS, 2015)

Reversible Radix-4 booth multiplier for DSP applications. - A. N. Nagamani; R. Nikhil; Manish Nagaraj; Vinod Kumar Agrawal (SPCOM, 2016)

An Exact approach for Complete Test Set Generation of Toffoli-Fredkin-Peres based Reversible Circuits. - A. N. Nagamani; S. Ashwin; B. Abhishek; Vinod Kumar Agrawal (J. Electron. Test., 2016)

Design and Analysis of Multiple Parameters Optimized n-Bit Reversible Magnitude Comparators. - A. N. Nagamani; S. Ashwin; B. Abhishek; K. V. Arjun; Vinod Kumar Agrawal (J. Circuits Syst. Comput., 2016)

Ancilla-input and garbage-output optimized design of a reversible quantum integer multiplier. - H. V. Jayashree; Himanshu Thapliyal; Hamid R. Arabnia; Vinod Kumar Agrawal (J. Supercomput., 2016)

Reversible circuit optimization using modified toffoli templates. - Mridula J. Deshpande; H. V. Jayashree; Vinod Kumar Agrawal (ICACCI, 2017)

Reversible circuit design for GCD computation in cryptography algorithms. - H. V. Jayashree; Skanda Kotethota; Vinod Kumar Agrawal (Int. J. Circuit Theory Appl., 2017)

Efficient Circuit Design of Reversible Square. - H. V. Jayashree; Himanshu Thapliyal; Vinod Kumar Agrawal (Trans. Comput. Sci., 2017)

DFT methodologies for testing k-CNOT, Fredkin and Peres based reversible circuits. - A. N. Nagamani; Vijetha Ravichander; Madhumita Harish; Vinod Kumar Agrawal (RAIT, 2018)

Design of Optimized Reversible Squaring and Sum-of-Squares Units. - A. N. Nagamani; Chirag Ramesh; Vinod Kumar Agrawal (Circuits Syst. Signal Process., 2018)

Design Approaches for Resource and Performance Optimization of Reversible BCD Addition and Unified BCD Addition/Subtraction Circuits. - H. V. Jayashree; Sharan Patil; Vinod Kumar Agrawal (J. Circuits Syst. Comput., 2018)

A Genetic Algorithm-Based Heuristic Method for Test Set Generation in Reversible Circuits. - A. N. Nagamani; S. N. Anuktha; N. Nanditha; Vinod Kumar Agrawal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)