: A Parallel Algorithm for Fault Simulation on the Connection Machine. - Vinod Narayanan; Vijay Pitchumani (ITC, 1988)

A Massively Parallel Algorithm for Fault Simulation on the Connection Machine. - Vinod Narayanan; Vijay Pitchumani (DAC, 1989)

Fault simulation on massively parallel SIMD machines algorithms, implementations and results. - Vinod Narayanan; Vijay Pitchumani (J. Electron. Test., 1992)

Static timing analysis for self resetting circuits. - Vinod Narayanan; Barbara A. Chappell; Bruce M. Fleischer (ICCAD, 1996)

Noise in deep submicron digital design. - Kenneth L. Shepard; Vinod Narayanan (ICCAD, 1996)

Global harmony: coupled noise analysis for full-chip RC interconnect networks. - Kenneth L. Shepard; Vinod Narayanan; Peter C. Elmendorf; Gutuan Zheng (ICCAD, 1997)

Conquering Noise in Deep-Submicron Digital ICs. - Kenneth L. Shepard; Vinod Narayanan (IEEE Des. Test Comput., 1998)

Harmony: static noise analysis of deep submicron digital integrated circuits. - Kenneth L. Shepard; Vinod Narayanan; Ron Rose (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

A built-in self-testing method for embedded multiport memory arrays. - Vinod Narayanan; Swaroop Ghosh; Wen-Ben Jone; Sunil R. Das (IEEE Trans. Instrum. Meas., 2005)

Oscillatory thermal structures in a reattaching jet flow. - Vinod Narayanan (J. Vis., 2007)

Prediction and visualization of supersonic nozzle flows using OpenFOAM. - Prasanth P. Nair; Vinod Narayanan; Abhilash Suryan; Heuy Dong Kim (J. Vis., 2022)