Rapid Prototyping of Reconfigurable Coprocessors. - Naren Narasimhan; Vinoo Srinivasan; Madhavi Vootukuru; Jeffrey Walrath; Sriram Govindarajan; Ranga Vemuri (ASAP, 1996)

Hierarchical behavioral partitioning for multicomponent synthesis. - Vinoo Srinivasan; Nand Kumar; Ranga Vemuri (EURO-DAC, 1996)

Hardware Software Partitioning with Integrated Hardware Design Space Exploration. - Vinoo Srinivasan; Shankar Radhakrishnan; Ranga Vemuri (DATE, 1998)

An Effective Design System for Dynamically Reconfigurable Architectures. - Sriram Govindarajan; Iyad Ouaiss; Meenakshi Kaul; Vinoo Srinivasan; Ranga Vemuri (FCCM, 1998)

An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures. - Iyad Ouaiss; Sriram Govindarajan; Vinoo Srinivasan; Meenakshi Kaul; Ranga Vemuri (IPPS/SPDP Workshops, 1998)

A Retiming Based Relaxation Heuristic for Resource-Constrained Loop Pipelining. - Vinoo Srinivasan; Ranga Vemuri (VLSI Design, 1998)

Task-Level Partitioning and RTL Design Space Exploration for Multi-FPGA Architectures. - Vinoo Srinivasan; Ranga Vemuri (FCCM, 1999)

Throughput Optimization with Design Space Exploration During Partitioning for Multi-FPGA Architectures. - Vinoo Srinivasan; Ranga Vemuri (FPGA, 1999)

Interconnect Synthesis for Reconfigurable Multi-FPGA Architectures. - Vinoo Srinivasan; Shankar Radhakrishnan; Ranga Vemuri; Jeffrey Walrath (IPPS/SPDP Workshops, 1999)

Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints. - Preetham Lakshmikanthan; Sriram Govindarajan; Vinoo Srinivasan; Ranga Vemuri (IPDPS Workshops, 2000)

A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures. - Sriram Govindarajan; Vinoo Srinivasan; Preetham Lakshmikanthan; Ranga Vemuri (VLSI Design, 2000)