A Methodology for Early and Accurate Analysis of Inrush and Latency Tradeoffs during Power-Domain Wakeup. - Vipul Singhal 001; Ayon Dey; Suresh Mallala; Somshubhra Paul (VDAT, 2013)

8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm process. - Vipul Kumar Singhal 001; Vinod Menezes; Srinivasa Chakravarthy; Mahesh Mehendale (ISSCC, 2015)

Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting. - Sundeep Javvaji; Vipul Singhal 001; Vinod Menezes; Rajat Chauhan; Shanthi Pavan (ESSCIRC, 2018)

A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems. - R. R. Manikandan; Vipul Kumar Singhal 001; Rajat Chauhan; Vinod Menezes; Mahesh Mehendale (VLSID, 2018)

Single Inductor Dual Output Buck Converter for Low Power Applications and Its Stability Analysis. - Sowmya Sankaranarayanan; Kulkarni Chaitali Vinod; Aswanth Sreekumar; Tonse Laxminidhi; Vipul Singhal 001; Rajat Chauhan (VLSID, 2018)

Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting. - Sundeep Javvaji; Vipul Singhal 001; Vinod Menezes; Rajat Chauhan; Shanthi Pavan (IEEE J. Solid State Circuits, 2019)

150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications. - Vipul Singhal 001; Rajat Chauhan; Vinod Menezes; R. R. Manikandan; Raveesh Magod; Mahesh Mehendale; Anantha P. Chandrakasan (VLSID, 2021)