CMOS/Magnetic Hybrid Architectures. - Guillaume Prenat; Mourad El Baraji; Wei Guo; Ricardo Sousa; Liliana Buda-Prejbeanu; Bernard Dieny; Virgile Javerliac; Jean-Pierre Nozieres; Weisheng Zhao; Eric Belhaire (ICECS, 2007)

Hybrid STT/CMOS Design of an Interrupt Based Instant On/Off Mechanism for Low-Power SoC. - Christophe Layer; Kotb Jabeur; Laurent Becker; Bernard Dieny; Stephane Gros; Virgile Javerliac; Pierre Paoli; Fabrice Bernard-Granger (ISVLSI, 2015)

Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks. - Christophe Layer; Kotb Jabeur; Stephane Gros; Laurent Becker; Pierre Paoli; Fabrice Bernard-Granger; Virgile Javerliac; Bernard Dieny (NEWCAS, 2015)

Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories. - Christophe Layer; Laurent Becker; Kotb Jabeur; Sylvain Claireux; Bernard Dieny; Guillaume Prenat; Gregory di Pendina; Stephane Gros; Pierre Paoli; Virgile Javerliac; Fabrice Bernard-Granger; Loïc Decloedt (ACM J. Emerg. Technol. Comput. Syst., 2016)