Vishal Gupta

Affiliations:
  • Georgia Institute of Technology, Analog and Power IC Design Lab, Atlanta, GA, USA


According to our database1, Vishal Gupta authored at least 6 papers between 2004 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2007
Achieving Less Than 2% 3- σ Mismatch With Minimum Channel-Length CMOS Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

A 5mA 0.6μm CMOS Miller-Compensated LDO Regulator with -27dB Worst-Case Power-Supply Rejection Using 60pF of On-Chip Capacitance.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
SiP integration of intelligent, adaptive, self-sustaining power management solutions for portable applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Predicting and Designing for the Impact of Process Variations and Mismatch on the Trim Range and Yield of Bandgap References.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A low dropout, CMOS regulator with high PSR over wideband frequencies.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Analysis and design of monolithic, high PSR, linear regulators for SoC applications.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004


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