Efficient on-line testing of FPGAs with provable diagnosabilities. - Vinay Verma; Shantanu Dutt; Vishal Suthar (DAC, 2004)

High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping. - Vishal Suthar; Shantanu Dutt (ACM Great Lakes Symposium on VLSI, 2005)

Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults. - Vishal Suthar; Shantanu Dutt (DATE, 2006)

A network-flow approach to timing-driven incremental placement for ASICs. - Shantanu Dutt; Huan Ren; Fenghua Yuan; Vishal Suthar (ICCAD, 2006)

Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions. - Vishal Suthar; Shantanu Dutt (VTS, 2006)

Built-in-Self-Test of FPGAs With Provable Diagnosabilities and High Diagnostic Coverage With Application to Online Testing. - Shantanu Dutt; Vinay Verma; Vishal Suthar (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Machine Learning Adoption in Blockchain-Based Smart Applications. - Vishal Suthar; Vipul Bansal; Ch. Srinivasa Reddy; José Luis Arias-Gonzáles; Devendra Singh; Devesh Pratap Singh (IC3I, 2022)