A 16-Core RISC Microprocessor with Network Extensions. - Vishnu Yalala; Derek Brasili; David Carlson; Adam Hughes; Anil Jain; Tim Kiszely; Kolar Kodandapani; Anand Varadharajan; Thucydides Xanthopoulos (ISSCC, 2006)

A 32-core RISC microprocessor with network accelerators, power management and testability features. - Brian Miller; Derek Brasili; Tim Kiszely; Rob Kuhn; Rahul Mehrotra; Manan Salvi; Mandar Kulkarni; Anand Varadharajan; Shi-Huang Yin; William Lin; Adam Hughes; Bill Stysiack; et al. (ISSCC, 2012)