A Low-Power and Area-Efficient Design of a Weighted Pseudorandom Test-Pattern Generator for a Test-Per-Scan Built-in Self-Test Architecture. - Vishnupriya Shivakumar; Chinnaiyan Senthilpari; Zubaida Binti Yusoff (IEEE Access, 2021)

Test power and area optimized logic built-in self-test with higher fault coverage for automobile SoCs. - Vishnupriya Shivakumar; Chinnaiyan Senthilpari; Zubaida Binti Yusoff (Microelectron. J., 2022)