An Energy Efficient Sub-Threshold Baseband Processor Architecture for Pulsed Ultra-Wideband Communications. - Vivienne Sze; Raúl Blázquez; Manish Bhardwaj; Anantha P. Chandrakasan (ICASSP (3), 2006)

A 0.4-V UWB baseband processor. - Vivienne Sze; Anantha P. Chandrakasan (ISLPED, 2007)

Parallel CABAC for low power video coding. - Vivienne Sze; Anantha P. Chandrakasan; Madhukar Budagavi; Minhua Zhou (ICIP, 2008)

A high throughput CABAC algorithm using syntax element partitioning. - Vivienne Sze; Anantha P. Chandrakasan (ICIP, 2009)

A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder. - Vivienne Sze; Daniel F. Finchelstein; Mahmut E. Sinangil; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2009)

Low-Power Impulse UWB Architectures and Circuits. - Anantha P. Chandrakasan; Fred S. Lee; David D. Wentzloff; Vivienne Sze; Brian P. Ginsburg; Patrick P. Mercier; Denis C. Daly; Raúl Blázquez (Proc. IEEE, 2009)

Multicore Processing and Efficient On-Chip Caching for H.264 and Future Video Decoders. - Daniel F. Finchelstein; Vivienne Sze; Anantha P. Chandrakasan (IEEE Trans. Circuits Syst. Video Technol., 2009)

Technologies for Ultradynamic Voltage Scaling. - Anantha P. Chandrakasan; Denis C. Daly; Daniel F. Finchelstein; Joyce Kwong; Yogesh K. Ramadass; Mahmut E. Sinangil; Vivienne Sze; Naveen Verma (Proc. IEEE, 2010)

Parallel algorithms and architectures for low power video decoding. - Vivienne Sze (2010)

Joint algorithm-architecture optimization of CABAC to increase speed and reduce area cost. - Vivienne Sze; Anantha P. Chandrakasan (ICASSP, 2011)

HEVC ALF decode complexity analysis and reduction. - Madhukar Budagavi; Vivienne Sze; Minhua Zhou (ICIP, 2011)

Unified forward+inverse transform architecture for HEVC. - Madhukar Budagavi; Vivienne Sze (ICIP, 2012)

Hardware-aware motion estimation search algorithm development for high-efficiency video coding (HEVC) standard. - Mahmut E. Sinangil; Anantha P. Chandrakasan; Vivienne Sze; Minhua Zhou (ICIP, 2012)

Memory cost vs. coding efficiency trade-offs for HEVC motion estimation engine. - Mahmut E. Sinangil; Anantha P. Chandrakasan; Vivienne Sze; Minhua Zhou (ICIP, 2012)

Parallelization of CABAC transform coefficient coding for HEVC. - Vivienne Sze; Madhukar Budagavi (PCS, 2012)

A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding. - Vivienne Sze; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2012)

High Throughput CABAC Entropy Coding in HEVC. - Vivienne Sze; Madhukar Budagavi (IEEE Trans. Circuits Syst. Video Technol., 2012)

Joint Algorithm-Architecture Optimization of CABAC. - Vivienne Sze; Anantha P. Chandrakasan (J. Signal Process. Syst., 2012)

A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications. - Chao-Tsung Huang; Mehul Tikekar; Chiraag Juvekar; Vivienne Sze; Anantha P. Chandrakasan (ISSCC, 2013)

A comparison of CABAC throughput for HEVC/H.265 VS. AVC/H.264. - Vivienne Sze; Madhukar Budagavi (SiPS, 2013)

Core Transform Design in the High Efficiency Video Coding (HEVC) Standard. - Madhukar Budagavi; Arild Fuldseth; Gisle Bjøntegaard; Vivienne Sze; Mangesh Sadafale (IEEE J. Sel. Top. Signal Process., 2013)

Cost and Coding Efficient Motion Estimation Design Considerations for High Efficiency Video Coding (HEVC) Standard. - Mahmut E. Sinangil; Vivienne Sze; Minhua Zhou; Anantha P. Chandrakasan (IEEE J. Sel. Top. Signal Process., 2013)

A 2014 Mbin/s deeply pipelined CABAC decoder for HEVC. - Yu-Hsin Chen; Vivienne Sze (ICIP, 2014)

Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization. - Mehul Tikekar; Chao-Tsung Huang; Vivienne Sze; Anantha P. Chandrakasan (ICIP, 2014)

Energy-efficient HOG-based object detection at 1080HD 60 fps with multi-scale support. - Amr Suleiman; Vivienne Sze (SiPS, 2014)

A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications. - Mehul Tikekar; Chao-Tsung Huang; Chiraag Juvekar; Vivienne Sze; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2014)

Entropy Coding in HEVC. - Vivienne Sze; Detlev Marpe (High Efficiency Video Coding, 2014)

Decoder Hardware Architecture for HEVC. - Mehul Tikekar; Chao-Tsung Huang; Chiraag Juvekar; Vivienne Sze; Anantha P. Chandrakasan (High Efficiency Video Coding, 2014)

Rotate intra block copy for still image coding. - Zhengdong Zhang 001; Vivienne Sze (ICIP, 2015)

A Deeply Pipelined CABAC Decoder for HEVC Supporting Level 6.2 High-Tier Applications. - Yu-Hsin Chen; Vivienne Sze (IEEE Trans. Circuits Syst. Video Technol., 2015)

Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks. - Yu-Hsin Chen; Joel S. Emer; Vivienne Sze (ISCA, 2016)

14.5 Eyeriss: An energy-efficient reconfigurable accelerator for deep convolutional neural networks. - Yu-Hsin Chen; Tushar Krishna; Joel S. Emer; Vivienne Sze (ISSCC, 2016)

A 58.6mW real-time programmable object detector with multi-scale multi-object support using deformable parts model on 1920×1080 video at 30fps. - Amr Suleiman; Zhengdong Zhang 001; Vivienne Sze (VLSI Circuits, 2016)

A 58.6mW Real-Time Programmable Object Detector with Multi-Scale Multi-Object Support Using Deformable Parts Model on 1920x1080 Video at 30fps. - Amr Suleiman; Zhengdong Zhang 001; Vivienne Sze (CoRR, 2016)

FAST: Free Adaptive Super-Resolution via Transfer for Compressed Videos. - Zhengdong Zhang 001; Vivienne Sze (CoRR, 2016)

Introduction to the Special Issue on HEVC Extensions and Efficient HEVC Implementations. - Jens-Rainer Ohm; Gary J. Sullivan; Vivienne Sze; Thomas Wiegand 001; Madhukar Budagavi (IEEE Trans. Circuits Syst. Video Technol., 2016)

An Energy-Efficient Hardware Implementation of HOG-Based Object Detection at 1080HD 60 fps with Multi-Scale Support. - Amr Suleiman; Vivienne Sze (J. Signal Process. Syst., 2016)

A method to estimate the energy consumption of deep neural networks. - Tien-Ju Yang; Yu-Hsin Chen; Joel S. Emer; Vivienne Sze (ACSSC, 2017)

Hardware for machine learning: Challenges and opportunities. - Vivienne Sze; Yu-Hsin Chen; Joel S. Einer; Amr Suleiman; Zhengdong Zhang 001 (CICC, 2017)

Designing Energy-Efficient Convolutional Neural Networks Using Energy-Aware Pruning. - Tien-Ju Yang; Yu-Hsin Chen; Vivienne Sze (CVPR, 2017)

FAST: A Framework to Accelerate Super-Resolution Processing on Compressed Videos. - Zhengdong Zhang 001; Vivienne Sze (CVPR Workshops, 2017)

Low power depth estimation for time-of-flight imaging. - James Noraky; Vivienne Sze (ICIP, 2017)

Towards closing the energy gap between HOG and CNN features for embedded vision (Invited paper). - Amr Suleiman; Yu-Hsin Chen; Joel S. Emer; Vivienne Sze (ISCAS, 2017)

Visual-Inertial Odometry on Chip: An Algorithm-and-Hardware Co-design Approach. - Zhengdong Zhang 001; Amr Suleiman; Luca Carlone; Vivienne Sze; Sertac Karaman (Robotics: Science and Systems, 2017)

Towards Closing the Energy Gap Between HOG and CNN Features for Embedded Vision. - Amr Suleiman; Yu-Hsin Chen; Joel S. Emer; Vivienne Sze (CoRR, 2017)

Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks. - Yu-Hsin Chen; Tushar Krishna; Joel S. Emer; Vivienne Sze (IEEE J. Solid State Circuits, 2017)

A 58.6 mW 30 Frames/s Real-Time Programmable Multiobject Detection Accelerator With Deformable Parts Models on Full HD 1920×1080 Videos. - Amr Suleiman; Zhengdong Zhang 001; Vivienne Sze (IEEE J. Solid State Circuits, 2017)

Using Dataflow to Optimize Energy Efficiency of Deep Neural Network Accelerators. - Yu-Hsin Chen; Joel S. Emer; Vivienne Sze (IEEE Micro, 2017)

Efficient Processing of Deep Neural Networks: A Tutorial and Survey. - Vivienne Sze; Yu-Hsin Chen; Tien-Ju Yang; Joel S. Emer (Proc. IEEE, 2017)

Hardware for machine learning: Challenges and opportunities. - Vivienne Sze; Yu-Hsin Chen; Joel S. Emer; Amr Suleiman; Zhengdong Zhang 001 (CICC, 2018)

NetAdapt: Platform-Aware Neural Network Adaptation for Mobile Applications. - Tien-Ju Yang; Andrew G. Howard; Bo Chen 019; Xiao Zhang; Alec Go; Mark Sandler 002; Vivienne Sze; Hartwig Adam (ECCV (10), 2018)

Determination of Saccade Latency Distributions using Video Recordings from Consumer-grade Devices. - Gladynel Saavedra-Peña; Hsin-Yu Lai; Vivienne Sze; Thomas Heldt (EMBC, 2018)

Enabling Saccade Latency Measurements with Consumer-Grade Cameras. - Hsin-Yu Lai; Gladynel Saavedra-Peña; Charles G. Sodini; Thomas Heldt; Vivienne Sze (ICIP, 2018)

Depth Estimation of Non-Rigid Objects for Time-Of-Flight Imaging. - James Noraky; Vivienne Sze (ICIP, 2018)

EE2: Workshop on circuits for social good. - Vivienne Sze; Alison J. Burdett; Sonia Leon; Rikky Muller; Farhana Sheikh; Yildiz Sinangil; Trudy Stetzler; Ingrid Verbauwhede; Alice Wang; Rabia Tugce Yazicigil (ISSCC, 2018)

Navion: A Fully Integrated Energy-Efficient Visual-Inertial Odometry Accelerator for Autonomous Navigation of Nano Drones. - Amr Suleiman; Zhengdong Zhang 001; Luca Carlone; Sertac Karaman; Vivienne Sze (VLSI Circuits, 2018)

NetAdapt: Platform-Aware Neural Network Adaptation for Mobile Applications. - Tien-Ju Yang; Andrew G. Howard; Bo Chen 019; Xiao Zhang; Alec Go; Vivienne Sze; Hartwig Adam (CoRR, 2018)

Eyeriss v2: A Flexible and High-Performance Accelerator for Emerging Deep Neural Networks. - Yu-Hsin Chen; Joel S. Emer; Vivienne Sze (CoRR, 2018)

Navion: A 2mW Fully Integrated Real-Time Visual-Inertial Odometry Accelerator for Autonomous Navigation of Nano Drones. - Amr Suleiman; Zhengdong Zhang 001; Luca Carlone; Sertac Karaman; Vivienne Sze (CoRR, 2018)

A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices. - Mehul Tikekar; Vivienne Sze; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2018)

Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs. - Yannan Nellie Wu; Joel S. Emer; Vivienne Sze (ICCAD, 2019)

Low Power Adaptive Time-of-Flight Imaging for Multiple Rigid Objects. - James Noraky; Charles Mathy; Alan Cheng; Vivienne Sze (ICIP, 2019)

FastDepth: Fast Monocular Depth Estimation on Embedded Systems. - Diana Wofk; Fangchang Ma; Tien-Ju Yang; Sertac Karaman; Vivienne Sze (ICRA, 2019)

FSMI: Fast Computation of Shannon Mutual Information for Information-Theoretic Mapping. - Zhengdong Zhang 001; Trevor Henderson; Vivienne Sze; Sertac Karaman (ICRA, 2019)

High-Throughput Computation of Shannon Mutual Information on Chip. - Peter Zhi Xuan Li; Zhengdong Zhang 001; Sertac Karaman; Vivienne Sze (Robotics: Science and Systems, 2019)

DeeperLab: Single-Shot Image Parser. - Tien-Ju Yang; Maxwell D. Collins; Yukun Zhu; Jyh-Jing Hwang; Ting Liu 005; Xiao Zhang; Vivienne Sze; George Papandreou; Liang-Chieh Chen (CoRR, 2019)

SysML: The New Frontier of Machine Learning Systems. - Alexander Ratner; Dan Alistarh; Gustavo Alonso; David G. Andersen; Peter Bailis; Sarah Bird; Nicholas Carlini; Bryan Catanzaro; Eric S. Chung; Bill Dally; Jeff Dean; Inderjit S. Dhillon; et al. (CoRR, 2019)

Design Considerations for Efficient Deep Neural Networks on Processing-in-Memory Accelerators. - Tien-Ju Yang; Vivienne Sze (CoRR, 2019)

Eyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile Devices. - Yu-Hsin Chen; Tien-Ju Yang; Joel S. Emer; Vivienne Sze (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

Navion: A 2-mW Fully Integrated Real-Time Visual-Inertial Odometry Accelerator for Autonomous Navigation of Nano Drones. - Amr Suleiman; Zhengdong Zhang 001; Luca Carlone; Sertac Karaman; Vivienne Sze (IEEE J. Solid State Circuits, 2019)

An Efficient and Continuous Approach to Information-Theoretic Exploration. - Theia Henderson; Vivienne Sze; Sertac Karaman (ICRA, 2020)

Balancing Actuation and Computing Energy in Motion Planning. - Soumya Sudhakar; Sertac Karaman; Vivienne Sze (ICRA, 2020)

An Architecture-Level Energy and Area Estimator for Processing-In-Memory Accelerator Designs. - Yannan Nellie Wu; Vivienne Sze; Joel S. Emer (ISPASS, 2020)

Efficient Computing for AI and Robotics. - Vivienne Sze (VLSI-DAT, 2020)

Depth Map Estimation of Dynamic Scenes Using Prior Depth Information. - James Noraky; Vivienne Sze (CoRR, 2020)

Freely scalable and reconfigurable optical hardware for deep learning. - Liane Bernstein; Alexander Sludds; Ryan Hamerly; Vivienne Sze; Joel S. Emer; Dirk R. Englund (CoRR, 2020)

FSMI: Fast computation of Shannon mutual information for information-theoretic mapping. - Zhengdong Zhang 001; Theia Henderson; Sertac Karaman; Vivienne Sze (Int. J. Robotics Res., 2020)

Low Power Depth Estimation of Rigid Objects for Time-of-Flight Imaging. - James Noraky; Vivienne Sze (IEEE Trans. Circuits Syst. Video Technol., 2020)

Measuring Saccade Latency Using Smartphone Cameras. - Hsin-Yu Lai; Gladynel Saavedra-Peña; Charles G. Sodini; Vivienne Sze; Thomas Heldt (IEEE J. Biomed. Health Informatics, 2020)

Efficient Processing of Deep Neural Networks - Vivienne Sze; Yu-Hsin Chen; Tien-Ju Yang; Joel S. Emer (Morgan & Claypool Publishers, 2020)

NetAdaptV2: Efficient Neural Architecture Search With Fast Super-Network Training and Architecture Optimization. - Tien-Ju Yang; Yi-Lun Liao; Vivienne Sze (CVPR, 2021)

Domain-Specific Language Abstractions for Compression. - Jessica Ray; Ajay Brahmakshatriya; Richard Wang; Shoaib Kamil 001; Albert Reuther; Vivienne Sze; Saman P. Amarasinghe (DCC, 2021)

Efficient Computation of Map-scale Continuous Mutual Information on Chip in Real Time. - Keshav Gupta; Peter Zhi Xuan Li; Sertac Karaman; Vivienne Sze (IROS, 2021)

Architecture-Level Energy Estimation for Heterogeneous Computing Systems. - Francis Wang; Yannan Nellie Wu; Matthew E. Woicik; Joel S. Emer; Vivienne Sze (ISPASS, 2021)

Sparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators. - Yannan Nellie Wu; Po-An Tsai; Angshuman Parashar; Vivienne Sze; Joel S. Emer (ISPASS, 2021)

Session 9 Overview: ML Processors From Cloud to Edge Machine Learning Subcommittee. - Sukhwan Lim; Luca Benini; Vivienne Sze (ISSCC, 2021)

SE4: ICs in PandemICs. - Negar Reiskarimian; Zeynep Toprak Deniz; Ulkuhan Guler 001; Kathy Wilcox; Alice Wang; Jane Gu; Yaoyao Jia; Alicia Klinefelter; Rikky Muller; Farhana Sheikh; Yildiz Sinangil; Trudy Stetzler; et al. (ISSCC, 2021)

Searching for Efficient Multi-Stage Vision Transformers. - Yi-Lun Liao; Sertac Karaman; Vivienne Sze (CoRR, 2021)

Memory-Efficient Gaussian Fitting for Depth Images in Real Time. - Peter Zhi Xuan Li; Sertac Karaman; Vivienne Sze (ICRA, 2022)

Uncertainty from Motion for DNN Monocular Depth Estimation. - Soumya Sudhakar; Vivienne Sze; Sertac Karaman (ICRA, 2022)

Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling. - Yannan Nellie Wu; Po-An Tsai; Angshuman Parashar; Vivienne Sze; Joel S. Emer (MICRO, 2022)

Developing a Series of AI Challenges for the United States Department of the Air Force. - Vijay Gadepally; Gregory Angelides; Andrei Barbu; Andrew Bowne; Laura J. Brattain; Tamara Broderick; Armando Cabrera; Glenn Carl; Ronisha Carter; Miriam Cha; Emilie Cowen; Jesse Cummings; et al. (CoRR, 2022)

App-Based Saccade Latency and Directional Error Determination Across the Adult Age Spectrum. - Hsin-Yu Lai; Gladynel Saavedra-Peña; Charles G. Sodini; Thomas Heldt; Vivienne Sze (IEEE Trans. Biomed. Eng., 2022)

RAELLA: Reforming the Arithmetic for Efficient, Low-Resolution, and Low-Loss Analog PIM: No Retraining Required! - Tanner Andrulis; Joel S. Emer; Vivienne Sze (ISCA, 2023)

LoopTree: Enabling Exploration of Fused-layer Dataflow Accelerators. - Michael Gilbert; Yannan Nellie Wu; Angshuman Parashar; Vivienne Sze; Joel S. Emer (ISPASS, 2023)

HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity. - Yannan Nellie Wu; Po-An Tsai; Saurav Muralidharan; Angshuman Parashar; Vivienne Sze; Joel S. Emer (MICRO, 2023)

Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity. - Zi Yu Xue; Yannan Nellie Wu; Joel S. Emer; Vivienne Sze (MICRO, 2023)

Data Centers on Wheels: Emissions From Computing Onboard Autonomous Vehicles. - Soumya Sudhakar; Vivienne Sze; Sertac Karaman (IEEE Micro, 2023)

Individualized Tracking of Neurocognitive-State-Dependent Eye-Movement Features Using Mobile Devices. - Hsin-Yu Lai; Charles G. Sodini; Vivienne Sze; Thomas Heldt (Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2023)

Unleashing the Power of Deep Learning. - Vivienne Sze (Commun. ACM, 2023)

ClearDepth: Addressing Depth Distortions Caused By Eyelashes For Accurate Geometric Gaze Estimation On Mobile Devices. - Jamie Koerner; Vivienne Sze (ICIP, 2024)

Architecture-Level Modeling of Photonic Deep Neural Network Accelerators. - Tanner Andrulis; Gohar Irfan Chaudhry; Vinith M. Suriyakumar; Joel S. Emer; Vivienne Sze (ISPASS, 2024)

CiMLoop: A Flexible, Accurate, and Fast Compute-In-Memory Modeling Tool. - Tanner Andrulis; Joel S. Emer; Vivienne Sze (ISPASS, 2024)

Gemino: Practical and Robust Neural Compression for Video Conferencing. - Vibhaalakshmi Sivaraman; Pantea Karimi; Vedantha Venkatapathy; Mehrdad Khani Shirkoohi; Sadjad Fouladi; Mohammad Alizadeh; Frédo Durand; Vivienne Sze (NSDI, 2024)

Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design. - Tanner Andrulis; Ruicong Chen; Hae-Seung Lee; Joel S. Emer; Vivienne Sze (CoRR, 2024)

LoopTree: Exploring the Fused-layer Dataflow Accelerator Design Space. - Michael Gilbert; Yannan Nellie Wu; Joel S. Emer; Vivienne Sze (CoRR, 2024)

DecTrain: Deciding When to Train a DNN Online. - Zih-Sing Fu; Soumya Sudhakar; Sertac Karaman; Vivienne Sze (CoRR, 2024)

GMMap: Memory-Efficient Continuous Occupancy Map Using Gaussian Mixture Model. - Peter Zhi Xuan Li; Sertac Karaman; Vivienne Sze (IEEE Trans. Robotics, 2024)

A Vision for Computational Decarbonization of Societal Infrastructure. - David E. Irwin 001; Prashant J. Shenoy; Mohammad Hajiesmaili; Walid A. Hanafy; Jimi Oke; Ramesh K. Sitaraman; Yuvraj Agarwal; Geoffrey J. Gordon; Zico Kolter; Deepak Rajagopal; Mani Srivastava 001; Vivienne Sze; et al. (IEEE Internet Comput., 2025)

DecTrain: Deciding When to Train a Monocular Depth DNN Online. - Zih-Sing Fu; Soumya Sudhakar; Sertac Karaman; Vivienne Sze (IEEE Robotics Autom. Lett., 2025)

GEVO: Memory-Efficient Monocular Visual Odometry Using Gaussians. - Dasong Gao; Peter Zhi Xuan Li; Vivienne Sze; Sertac Karaman (IEEE Robotics Autom. Lett., 2025)