Energy-efficient 32 × 32-bit multiplier in tunable near-zero threshold CMOS. - Vjekoslav Svilan; Masataka Matsui; James B. Burr (ISLPED, 2000)

Effects of elevated temperature on tunable near-zero threshold CMOS. - Vjekoslav Svilan; James B. Burr; G. Tyler (ISLPED, 2001)

Simulation-Based Performance Prediction of HPC Applications: A Case Study of HPL. - Gen Xu; Huda Ibeid; Xin Jiang; Vjekoslav Svilan; Zhaojuan Bian (HUST/ProTools@SC, 2020)