HARTES Toolchain Early Evaluation: Profiling, Compilation and HDL Generation. - Koen Bertels; Georgi Kuzmanov; Elena Moscu Panainte; Georgi Gaydadjiev; Yana Yankova; Vlad Mihai Sima; Kamana Sigdel; Roel Meeuws; Stamatis Vassiliadis (FPL, 2007)

Resource allocation algorithm and OpenMP extensions for parallel execution on a heterogeneous reconfigurable platform. - Vlad Mihai Sima; Elena Moscu Panainte; Koen Bertels (FPL, 2008)

Compiler assisted runtime task scheduling on a reconfigurable computer. - Mojtaba Sabeghi; Vlad Mihai Sima; Koen Bertels (FPL, 2009)

Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform. - Vlad Mihai Sima; Koen Bertels (IPDPS, 2009)

Runtime Memory Allocation in a Heterogeneous Reconfigurable Platform. - Vlad Mihai Sima; Koen Bertels (ReConFig, 2009)

HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms. - Koen Bertels; Vlad Mihai Sima; Yana Yankova; Georgi Kuzmanov; Wayne Luk; José Gabriel F. Coutinho; Fabrizio Ferrandi; Christian Pilato; Marco Lattuada 001; Donatella Sciuto; Andrea Michelotti (IEEE Micro, 2010)

IP-XACT extensions for Reconfigurable Computing. - Razvan Nane; Sven van Haastregt; Todor P. Stefanov; Bart Kienhuis; Vlad Mihai Sima; Koen Bertels (ASAP, 2011)

Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures. - Giovanni Mariani; Vlad Mihai Sima; Gianluca Palermo; Vittorio Zaccaria; Cristina Silvano; Koen Bertels (DATE, 2012)

DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler. - Razvan Nane; Vlad Mihai Sima; Bryan Olivier; Roel Meeuws; Yana Yankova; Koen Bertels (FPL, 2012)

Area constraint propagation in high level synthesis. - Razvan Nane; Vlad Mihai Sima; Koen Bertels (FPT, 2012)

A lightweight speculative and predicative scheme for hardware execution. - Razvan Nane; Vlad Mihai Sima; Koen Bertels (ReConFig, 2012)

Compiler Assisted Runtime Adaptation. - Vlad Mihai Sima (2012)

Run-time optimization of a dynamically reconfigurable embedded system through performance prediction. - Giovanni Mariani; Vlad Mihai Sima; Gianluca Palermo; Vittorio Zaccaria; Giacomo Marchiori; Cristina Silvano; Koen Bertels (FPL, 2013)

Quipu: A Statistical Model for Predicting Hardware Resources. - Roel Meeuws; Sayyed Arash Ostadzadeh; Carlo Galuzzi; Vlad Mihai Sima; Razvan Nane; Koen Bertels (ACM Trans. Reconfigurable Technol. Syst., 2013)

DRuiD: Designing reconfigurable architectures with decision-making support. - Giovanni Mariani; Gianluca Palermo; Roel Meeuws; Vlad Mihai Sima; Cristina Silvano; Koen Bertels (ASP-DAC, 2014)

High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain. - Razvan Nane; Vlad Mihai Sima; Cuong Pham-Quoc; Fernando M. Gonçalves; Koen Bertels (EUC, 2014)

FPGA-accelerated Monte-Carlo integration using stratified sampling and Brownian bridges. - Mark de Jong; Vlad Mihai Sima; Koen Bertels; David Thomas (FPT, 2014)

FPGA acceleration of the pair-HMMs forward algorithm for DNA sequence analysis. - Shanshan Ren; Vlad Mihai Sima; Zaid Al-Ars (BIBM, 2015)

Heterogeneous Hardware/Software Acceleration of the BWA-MEM DNA Alignment Algorithm. - Nauman Ahmed; Vlad Mihai Sima; Ernst Houtgast; Koen Bertels; Zaid Al-Ars (ICCAD, 2015)

An FPGA-based systolic array to accelerate the BWA-MEM genomic mapping algorithm. - Ernst Joachim Houtgast; Vlad Mihai Sima; Koen Bertels; Zaid Al-Ars (SAMOS, 2015)

GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing. - Ernst Joachim Houtgast; Vlad Mihai Sima; Koen Bertels; Zaid Al-Ars (ARCS, 2016)

Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms. - Ernst Joachim Houtgast; Vlad Mihai Sima; Giacomo Marchiori; Koen Bertels; Zaid Al-Ars (FCCM, 2016)

Power-efficiency analysis of accelerated BWA-MEM implementations on heterogeneous computing platforms. - Ernst Joachim Houtgast; Vlad Mihai Sima; Giacomo Marchiori; Koen Bertels; Zaid Al-Ars (ReConFig, 2016)

An Efficient GPUAccelerated Implementation of Genomic Short Read Mapping with BWAMEM. - Ernst Joachim Houtgast; Vlad Mihai Sima; Koen Bertels; Zaid Al-Ars (SIGARCH Comput. Archit. News, 2016)

A Survey and Evaluation of FPGA High-Level Synthesis Tools. - Razvan Nane; Vlad Mihai Sima; Christian Pilato; Jongsok Choi; Blair Fort; Andrew Canis; Yu Ting Chen; Hsuan Hsiao; Stephen Brown 003; Fabrizio Ferrandi; Jason Helge Anderson; Koen Bertels (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

High Performance Streaming Smith-Waterman Implementation with Implicit Synchronization on Intel FPGA using OpenCL. - Ernst Houtgast; Vlad Mihai Sima; Zaid Al-Ars (BIBE, 2017)

Comparative Analysis of System-Level Acceleration Techniques in Bioinformatics: A Case Study of Accelerating the Smith-Waterman Algorithm for BWA-MEM. - Ernst Joachim Houtgast; Vlad Mihai Sima; Koen Bertels; Zaid Al-Ars (BIBE, 2018)

Hardware acceleration of BWA-MEM genomic short read mapping for longer read lengths. - Ernst Joachim Houtgast; Vlad Mihai Sima; Koen Bertels; Zaid Al-Ars (Comput. Biol. Chem., 2018)