Resource Conflict Detection in Simulation of Function Unit Pipelines. - Pekka Jääskeläinen; Vladimír Guzma; Jarmo Takala (SAMOS, 2007)

Trade-offs in mapping high-level dataflow graphs onto ASIPs. - Vladimír Guzma; Shuvra S. Bhattacharyya; Pertti Kellomäki; Jarmo Takala (SoC, 2008)

Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic. - Vladimír Guzma; Pekka Jääskeläinen; Pertti Kellomäki; Jarmo Takala (SAMOS, 2008)

Resource conflict detection in simulation of function unit pipelines. - Pekka Jääskeläinen; Vladimír Guzma; Viljami Korhonen (J. Syst. Archit., 2008)

Reducing processor energy consumption by compiler optimization. - Vladimír Guzma; Teemu Pitkänen; Pertti Kellomäki; Jarmo Takala (SiPS, 2009)

Reducing instruction memory energy consumption by using Instruction Buffer and after scheduling analysis. - Vladimír Guzma; Teemu Pitkänen; Jarmo Takala (SoC, 2010)

Effects of loop unrolling and use of instruction buffer on processor energy consumption. - Vladimír Guzma; Teemu Pitkänen; Jarmo Takala (SoC, 2011)

Instruction buffer with limited control flow and loop nest support. - Vladimír Guzma; Teemu Pitkänen; Jarmo Takala (ICSAMOS, 2011)

A 122Mb/s Turbo decoder using a mid-range GPU. - Xianjun Jiao; Canfeng Chen; Pekka Jääskeläinen; Vladimír Guzma; Heikki Berg (IWCMC, 2013)

Turbo decoding on tailored OpenCL processor. - Heikki Kultala; Otto Esko; Pekka Jääskeläinen; Vladimír Guzma; Jarmo Takala; Xianjun Jiao; Tommi Zetterman; Heikki Berg (IWCMC, 2013)

Use of compiler optimization of software bypassing as a method to improve energy efficiency of exposed data path architectures. - Vladimír Guzma; Teemu Pitkänen; Jarmo Takala (EURASIP J. Embed. Syst., 2013)

Improving Energy Efficiency of Application-Specific Instruction-Set Processors. - Vladimír Guzma (2017)