A new architecture for high throughput, low latency NB-LDPC check node processing. - Philipp Schläfer; Vladimir Rybalkin; Norbert Wehn; Matthias Alles; Timo Lehnigk-Emden; Emmanuel Boutillon (PIMRC, 2015)

A New Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256). - Vladimir Rybalkin; Philipp Schläfer; Norbert Wehn (VTC Spring, 2016)

Hardware architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition. - Vladimir Rybalkin; Norbert Wehn; Mohammad Reza Yousefi; Didier Stricker (DATE, 2017)

iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing: Percentile Based Binarization. - Vladimir Rybalkin; Syed Saqib Bukhari; Muhammad Mohsin Ghaffar; Aqib Ghafoor; Norbert Wehn; Andreas Dengel 001 (DocEng, 2018)

FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. - Vladimir Rybalkin; Alessandro Pappalardo; Muhammad Mohsin Ghaffar; Giulio Gambardella; Norbert Wehn; Michaela Blott (FPL, 2018)

An In-DRAM Neural Network Processing Engine. - Chirag Sudarshan; Jan Lappas; Muhammad Mohsin Ghaffar; Vladimir Rybalkin; Christian Weis; Matthias Jung 001; Norbert Wehn (ISCAS, 2019)

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction. - Menbere Kina Tekleyohannes; Vladimir Rybalkin; Muhammad Mohsin Ghaffar; Norbert Wehn; Andreas Dengel 001 (ReConFig, 2019)

When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. - Vladimir Rybalkin; Norbert Wehn (FPGA, 2020)

Real-Time Energy Efficient Hand Pose Estimation: A Case Study. - Mhd Rashed Al Koutayni; Vladimir Rybalkin; Jameel Malik; Ahmed Elhayek; Christian Weis; Gerd Reis; Norbert Wehn; Didier Stricker (Sensors, 2020)

Efficient Hardware Architectures for 1D- and MD-LSTM Networks. - Vladimir Rybalkin; Chirag Sudarshan; Christian Weis; Jan Lappas; Norbert Wehn; Li Cheng (J. Signal Process. Syst., 2020)

HALF: Holistic Auto Machine Learning for FPGAs. - Jonas Ney; Dominik Marek Loroch; Vladimir Rybalkin; Nico Weber; Jens Krüger 004; Norbert Wehn (FPL, 2021)

Embedded Face Recognition for Personalized Services in the Assistive Robotics. - Iris Walter; Jonas Ney; Tim Hotfilter; Vladimir Rybalkin; Julian Höfer; Norbert Wehn; Jürgen Becker 001 (PKDD/ECML Workshops (1), 2021)

iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing. - Menbere Kina Tekleyohannes; Vladimir Rybalkin; Muhammad Mohsin Ghaffar; Javier Alejandro Varela; Norbert Wehn; Andreas Dengel 001 (Int. J. Parallel Program., 2021)

iDocChip: A Configurable Hardware Accelerator for an End-to-End Historical Document Image Processing. - Menbere Kina Tekleyohannes; Vladimir Rybalkin; Muhammad Mohsin Ghaffar; Javier Alejandro Varela; Norbert Wehn; Andreas Dengel 001 (J. Imaging, 2021)

Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. - Vladimir Rybalkin; Chirag Sudarshan; Christian Weis; Jan Lappas; Norbert Wehn; Li Cheng (J. Signal Process. Syst., 2021)

When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. - Vladimir Rybalkin; Jonas Ney; Menbere Kina Tekleyohannes; Norbert Wehn (ACM Trans. Reconfigurable Technol. Syst., 2022)

Efficient hardware accleration of recurrent neural networks = Effiziente Hardwarebeschleunigung rekurrenter neuronaler Netze. - Vladimir Rybalkin (2022)

eFAirWrite: Bringing energy efficient text entry to next generation smart devices. - Muhammad Mohsin Ghaffar; Ahmad Abdullah; Junaid Younas; Vladimir Rybalkin; Jonas Ney; Paul Lukowicz; Norbert Wehn (Expert Syst. Appl., 2025)

Low-power, Energy-efficient, Cardiologist-level Atrial Fibrillation Detection for Wearable Devices. - Dominik Marek Loroch; Johannes Feldmann; Vladimir Rybalkin; Norbert Wehn (CoRR, 2025)