Fast Evaluation of Boolean Circuits Based on Two-Players Game and Optical Connectivity Circuits. - Yosi Ben-Asher; Eldar Fisher; Gadi Haber; Vladislav Tartakovsky (ICPP, 2012)

Using Multi-op Instructions as a Way to Generate ASIPs with Optimized Pipeline Structure. - Yosi Ben-Asher; Irina Lipov; Vladislav Tartakovsky; Dror Tiv (FCCM, 2014)

Student Research Poster: Compiling Boolean Circuits to Non-deterministic Branching Programs to be Implemented by Light Switching Circuits. - Vladislav Tartakovsky (PACT, 2016)

Generating ASIPs with Reduced Number of Connections to the Register-File. - Yosi Ben-Asher; Irina Lipov; Vladislav Tartakovsky; Dror Tiv (Int. J. Parallel Program., 2017)

An FPGA Scalable Parallel Viterbi Decoder. - Yosi Ben-Asher; Vladislav Tartakovsky; Katrina Portman; Orr Zilberman; Avishi Hadar (MCSoC, 2018)

Efficient Conversion of Boolean Circuits to Nondeterministic Branching Programs. - Yosi Ben-Asher; Vladislav Tartakovsky (IPDPS Workshops, 2019)

Speeding up the computations by using Non-Deterministic Branching programs instead of Boolean Cirquits. - Vladislav Tartakovsky (2020)

FPGA Realization of the Reconfigurable Mesh Counting Algorithm. - Yosi Ben-Asher; Esti Stein; Vladislav Tartakovsky (J. Circuits Syst. Comput., 2021)