Eine Scheduling Heuristik zur Minimierung der Verlustleistung. - Peter Zipf; Volker Hampel; Manfred Glesner; Thilo Pionteck (MBMV, 2006)

FPGA-Accelerated Deletion-Tolerant Coding for Reliable Distributed Storage. - Peter Sobe; Volker Hampel (ARCS, 2007)

Designing coprocessors for hybrid compute systems. - Volker Hampel; Peter Sobe; Erik Maehle (IPDPS, 2008)

Experiences with a FPGA-based Reed/Solomon-encoding coprocessor. - Volker Hampel; Peter Sobe; Erik Maehle (Microprocess. Microsystems, 2008)

High-Level Application Design for Hybrid Computing Systems. - Volker Hampel; Erik Maehle (ARCS Workshops, 2010)

A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems. - Volker Hampel; Grigori Goronzy; Erik Maehle (ARCS, 2011)

An Approach for Performance Estimation of Hybrid Systems with FPGAs and GPUs as Coprocessors. - Volker Hampel; Thilo Pionteck; Erik Maehle (ARCS, 2012)

Leistungsbewertung und -analyse hybrider Rechnersysteme auf FPGA- und GPU-Basis. - Volker Hampel (2012)