Gate leakage properties of MOS devices with tri-layer high-k gate dielectric. - W. B. Chen; Jing-Ping Xu; Pui-To Lai; Y. P. Li; S. G. Xu (Microelectron. Reliab., 2007)

A threshold-voltage model of SiGe-channel pMOSFET without Si cap layer. - X. Zou; Jing-Ping Xu; C. X. Li; Pui-To Lai; W. B. Chen (Microelectron. Reliab., 2007)

A 2D threshold-voltage model for small MOSFET with quantum-mechanical effects. - Jing-Ping Xu; Y. P. Li; Pui-To Lai; W. B. Chen; S. G. Xu; J. G. Guan (Microelectron. Reliab., 2008)

A novel soldering method to evaluate PCB pad cratering for pin-pull testing. - Miao Cai; D. J. Xie; W. B. Chen; B. Y. Wu; Dao-Guo Yang; G. Q. Zhang (Microelectron. Reliab., 2013)