High Speed Interconnection Using the Clos Network. - William A. Payne III; Fillia Makedon; W. Robert Daasch (ICS, 1987)

Automation of the ic layout of continuous-time transconductance-capacitor filters. - W. Robert Daasch; Martine Wedlake; Rolf Schaumann; Pan Wu (Int. J. Circuit Theory Appl., 1992)

A 20 MHz Fully-balanced Transconductance-C Filter in 2 µm CMOS Technology. - Pan Wu; Rolf Schaumann; W. Robert Daasch (ISCAS, 1993)

Accurate Predictions of Parallel Program Execution Time. - Michael A. Driscoll; W. Robert Daasch (J. Parallel Distributed Comput., 1995)

Variance reduction using wafer patterns in I_ddQ data. - W. Robert Daasch; James McNames; Daniel Bockelman; Kevin Cota (ITC, 2000)

TEM2P2EST: A Thermal Enabled Multi-model Power/Performance ESTimator. - Ashutosh S. Dhodapkar; Chee How Lim; George Cai; W. Robert Daasch (PACS, 2000)

Neighbor selection for variance reduction in I_DDQ and other parametric data. - W. Robert Daasch; Kevin Cota; James McNames; Robert Madge (ITC, 2001)

A Thermal-Aware Superscalar Microprocessor (invited). - Chee How Lim; W. Robert Daasch; George Cai (ISQED, 2002)

Neighbor Selection for Variance Reduction in IDDQ and Other Parametric Data. - W. Robert Daasch; Kevin Cota; James McNames; Robert Madge (ITC, 2002)

Screening MinVDD Outliers Using Feed-Forward Voltage Testing. - Robert Madge; B. H. Goh; V. Rajagopalan; C. Macchietto; W. Robert Daasch; Chris Schuermyer; C. Taylor; David Turner (ITC, 2002)

Isolating and Removing Sources of Variation in Test Data. - David Turner; David Abercrombie; James McNames; W. Robert Daasch; Robert Madge (ITC, 2002)

Statistical Post-Processing at Wafersort - An Alternative to Burn-in and a Manufacturable Solution to Test Limit Setting for Sub-micron Technologies. - Robert Madge; Manu Rehani; Kevin Cota; W. Robert Daasch (VTS, 2002)

Neighborhood Selection for IDDQ Outlier Screening at Wafer Sort. - W. Robert Daasch; James McNames; Robert Madge; Kevin Cota (IEEE Des. Test Comput., 2002)

Leakage and Process Variation Effects in Current Testing on Future CMOS Circuits. - Ali Keshavarzi; James W. Tschanz; Siva G. Narendra; Vivek De; W. Robert Daasch; Kaushik Roy 001; Manoj Sachdev; Charles F. Hawkins (IEEE Des. Test Comput., 2002)

Screening VDSM Outliers using Nominal and Subthreshold Supply Voltage IDDQ. - Chris Schuermyer; Brady Benware; Kevin Cota; Robert Madge; W. Robert Daasch; L. Ning (ITC, 2003)

Effectiveness Comparisons of Outlier Screening Methods for Frequency Dependent Defects on Complex ASICs. - Brady Benware; Robert Madge; Cam Lu; W. Robert Daasch (VTS, 2003)

Obtaining High Defect Coverage for Frequency-Dependent Defects in Complex ASICs. - Robert Madge; Brady Benware; W. Robert Daasch (IEEE Des. Test Comput., 2003)

A radio-frequency CMOS active inductor and its application in designing high-Q filters. - Haiqiao Xiao; Rolf Schaumann; W. Robert Daasch; Phillip K. Wong; Branimir Pejcinovic (ISCAS (4), 2004)

Dude! Where's my data? - Cracking Open the Hermetically Sealed Tester. - W. Robert Daasch; Manu Rehani (ITC, 2004)

In Search of the Optimum Test Set - Adaptive Test Methods for Maximum Defect Coverage and Lowest Test Cost. - Robert Madge; Brady Benware; Ritesh P. Turakhia; W. Robert Daasch; Chris Schuermyer; Jens Ruffler (ITC, 2004)

Minimum Testing Requirements to Screen Temperature Dependent Defects. - Chris Schuermyer; Jens Ruffler; W. Robert Daasch (ITC, 2004)

Detection of Temperature Sensitive Defects Using ZTC. - Ethan Long; W. Robert Daasch; Robert Madge; Brady Benware (VTS, 2004)

Variance reduction and outliers: statistical analysis of semiconductor test data. - W. Robert Daasch; Robert Madge (ITC, 2005)

Data-driven models for statistical testing: measurements, estimates and residuals. - W. Robert Daasch; Robert Madge (ITC, 2005)

The value of statistical testing for quality, yield and test cost improvement. - Robert Madge; Brady Benware; Mark Ward; W. Robert Daasch (ITC, 2005)

Burn-in reduction using principal component analysis. - Amit Nahar; W. Robert Daasch; Suresh Subramaniam (ITC, 2005)

Defect Screening Using Independent Component Analysis on I_DDQ. - Ritesh P. Turakhia; Brady Benware; Robert Madge; Thaddeus T. Shannon; W. Robert Daasch (VTS, 2005)

Changing Test and Data Modeling Requirements for Screening Latent Defects as Statistical Outliers. - Ritesh P. Turakhia; W. Robert Daasch; Joel Lurkins; Brady Benware (IEEE Des. Test Comput., 2006)

Silicon evaluation of longest path avoidance testing for small delay defects. - Ritesh P. Turakhia; W. Robert Daasch; Mark Ward; John Van Slyke (ITC, 2007)

Analyzing the Impact of Fault Tolerant BIST for VLSI Design. - Saurabh Jain; W. Robert Daasch; David Armbrust (DFT, 2008)

Application of non-parametric statistics of the parametric response for defect diagnosis. - Rama Gudavalli; W. Robert Daasch; Phil Nigh; Douglas Heaberlin (ITC, 2009)

Multidimensional Test Escape Rate Modeling. - Kenneth M. Butler; John M. Carulli Jr.; Jayashree Saxena; Amit Nahar; W. Robert Daasch (IEEE Des. Test Comput., 2009)

Statistics in Semiconductor Test: Going beyond Yield. - W. Robert Daasch; C. Glenn Shirley; Amit Nahar (IEEE Des. Test Comput., 2009)

Die-level adaptive test: Real-time test reordering and elimination. - Kapil R. Gotkhindikar; W. Robert Daasch; Kenneth M. Butler; John M. Carulli Jr.; Amit Nahar (ITC, 2011)

Board manufacturing test correlation to IC manufacturing test. - C. Glenn Shirley; W. Robert Daasch; Phil Nigh; Zoe Conroy (ITC, 2014)

Copula Models of Correlation: A DRAM Case Study. - C. Glenn Shirley; W. Robert Daasch (IEEE Trans. Computers, 2014)

Generalization of an outlier model into a "global" perspective. - Sebastian Siatkowski; Chia-Ling Chang; Li-C. Wang; Nikolas Sumikawa; LeRoy Winemberg; W. Robert Daasch (ITC, 2015)

What we know after twelve years developing and deploying test data analytics solutions. - Kenneth M. Butler; Amit Nahar; W. Robert Daasch (ITC, 2016)

Consistency in wafer based outlier screening. - Sebastian Siatkowski; Chuanhe Jay Shan; Li-C. Wang; Nikolas Sumikawa; W. Robert Daasch; John M. Carulli (VTS, 2016)