The Demarcate Construction: A New Form of Tree-based Priority Queues. - Rick Siow Mong Goh; Wai Teng Tang; Ian Li-Jin Thng; Marie Therese Robles Quieta (Informatica (Slovenia), 2004)

Ladder queue: An O(1) priority queue structure for large-scale discrete event simulation. - Wai Teng Tang; Rick Siow Mong Goh; Ian Li-Jin Thng (ACM Trans. Model. Comput. Simul., 2005)

Tulipse: A Visualization Framework for User-Guided Parallelization. - Yi Wen Wong; Tomasz Dubrownik; Wai Teng Tang; Wen Jun Tan; Rubing Duan; Rick Siow Mong Goh; Shyh-Hao Kuo; Stephen John Turner; Weng-Fai Wong (Euro-Par, 2012)

Automatic Refactoring of Legacy Fortran Code to the Array Slicing Notation. - Chandrasehar Rajaseharan; Wen Jun Tan; Wai Teng Tang; Stephen John Turner; Shyh-Hao Kuo; Rick Siow Mong Goh; Weng-Fai Wong (ICPADS, 2012)

Optimizing and Auto-Tuning Iterative Stencil Loops for GPUs with the In-Plane Method. - Wai Teng Tang; Wen Jun Tan; Ratna Krishnamoorthy; Yi Wen Wong; Shyh-Hao Kuo; Rick Siow Mong Goh; Stephen John Turner; Weng-Fai Wong (IPDPS, 2013)

Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes. - Wai Teng Tang; Wen Jun Tan; Rajarshi Ray 001; Yi Wen Wong; Weiguang Chen; Shyh-Hao Kuo; Rick Siow Mong Goh; Stephen John Turner; Weng-Fai Wong (SC, 2013)

Optimizing and auto-tuning scale-free sparse matrix-vector multiplication on Intel Xeon Phi. - Wai Teng Tang; Ruizhe Zhao; Mian Lu; Yun Liang 001; Huynh Phung Huyng; Xibai Li; Rick Siow Mong Goh (CGO, 2015)

A Code Generation Framework for Targeting Optimized Library Calls for Multiple Platforms. - Wen Jun Tan; Wai Teng Tang; Rick Siow Mong Goh; Stephen John Turner; Weng-Fai Wong (IEEE Trans. Parallel Distributed Syst., 2015)

A Family of Bit-Representation-Optimized Formats for Fast Sparse Matrix-Vector Multiplication on the GPU. - Wai Teng Tang; Wen Jun Tan; Rick Siow Mong Goh; Stephen John Turner; Weng-Fai Wong (IEEE Trans. Parallel Distributed Syst., 2015)

Automatic Segmentation of Left Ventricular Myocardium by Deep Convolutional and De-convolutional Neural Networks. - XuLei Yang; Like Gobeawan; Si Yong Yeo; Wai Teng Tang; Zhenzhou Wu; Yi Su 001 (CinC, 2016)

Scale-Free Sparse Matrix-Vector Multiplication on Many-Core Architectures. - Yun Liang 001; Wai Teng Tang; Ruizhe Zhao; Mian Lu; Huynh Phung Huynh; Rick Siow Mong Goh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Exploiting Sparsity to Accelerate Fully Connected Layers of CNN-Based Applications on Mobile SoCs. - Xinfeng Xie; Dayou Du; Qian Li 027; Yun Liang 001; Wai Teng Tang; Zhongliang Ong; Mian Lu; Huynh Phung Huynh; Rick Siow Mong Goh (ACM Trans. Embed. Comput. Syst., 2018)

A System-Level Simulator for RRAM-Based Neuromorphic Computing Chips. - Matthew Kay Fei Lee; Yingnan Cui; Thannirmalai Somu; Tao Luo 014; Jun Zhou 014; Wai Teng Tang; Weng-Fai Wong; Rick Siow Mong Goh (ACM Trans. Archit. Code Optim., 2019)

Automatic detection of anatomical landmarks in brain MR scanning using multi-task deep neural networks. - Xulei Yang; Wai Teng Tang; Gabriel Tjio; Si Yong Yeo; Yi Su 001 (Neurocomputing, 2020)

An FPGA-Based Hardware Emulator for Neuromorphic Chip With RRAM. - Tao Luo 014; Xuan Wang; Chuping Qu; Matthew Kay Fei Lee; Wai Teng Tang; Weng-Fai Wong; Rick Siow Mong Goh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

DTNN: Energy-efficient Inference with Dendrite Tree Inspired Neural Networks for Edge Vision Applications. - Tao Luo 014; Wai Teng Tang; Matthew Kay Fei Lee; Chuping Qu; Weng-Fai Wong; Rick Siow Mong Goh (CoRR, 2021)