Design for Test Methodology for the IBM PowerPC 440 Embedded Core. - Waleed Al-Assadi; Thomas Dick (CDES, 2005)

Nanofabric PLA Architecture with Double Variable Redundancy. - Mandar V. Joshi; Waleed Al-Assadi (CDES, 2007)

Nanofabric PLA architecture with Redundancy Enhancement. - Mandar V. Joshi; Waleed Al-Assadi (DFT, 2007)

Null Conventional Logic (NCL) Implementation of a Bit-Wise Pipeline Dual-Rail (NCL) 2 (to the power of) S Complement Multiplier. - Indira Dugganapally; Waleed Al-Assadi (CDES, 2009)

Enhancing Security Against Software Attacks with Reprogrammable Hardware. - Todd R. Andel; Lindsey N. Whitehurst; Jeffrey Todd McDonald; Waleed Al-Assadi (ICDIS, 2018)