Novel Three Dimensional (3D) NAND Flash Memory Array Having Tied Bit-line and Ground Select Transistor (TiGer). - Se Hwan Park; Yoon Kim; Wandong Kim; Joo Yun Seo; Hyungjin Kim 001; Byung-Gook Park (IEICE Trans. Electron., 2012)

7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers. - Dongku Kang; Woopyo Jeong; Chulbum Kim; Doo-Hyun Kim; Yong-Sung Cho; Kyung-Tae Kang; Jinho Ryu; Kyung-Min Kang; Sungyeon Lee; Wandong Kim; Hanjun Lee; Jaedoeg Yu; et al. (ISSCC, 2016)

256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers. - Dongku Kang; Woopyo Jeong; Chulbum Kim; Doo-Hyun Kim; Yong-Sung Cho; Kyung-Tae Kang; Jinho Ryu; Kyung-Min Kang; Sungyeon Lee; Wandong Kim; Hanjun Lee; Jaedoeg Yu; et al. (IEEE J. Solid State Circuits, 2017)

Cell Operation Technologies to Overcome Scale-down Issues in 3D NAND Flash Memory. - Wandong Kim; Dae-Seok Byeon; Sung-Min Joe; Jinyub Lee; Jai Hyuk Song (ICEIC, 2022)