Quasi Cyclic-LDPC codes based on PEG algorithm with maximized girth property. - Patanasak Prompakdee; Watid Phakphisut; Pornchai Supnithi (ISPACS, 2011)

LDPC decoder with modified LLR for bit patterned media with write errors. - Warangrat Wiriya; Watid Phakphisut; Pornchai Supnithi (ISPACS, 2011)

Structured LDPC Codes to Reduce Pseudo Cycles for Turbo Equalization in Perpendicular Magnetic Recording. - Pornchai Supnithi; Watid Phakphisut; Wicharn Singhaudom (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Mixed-scheduling belief propagation for LDPC decoders in the magnetic recording systems. - Watid Phakphisut; Pornchai Supnithi (ISITA, 2012)

Design of Quasi-Cyclic LDPC Codes with Maximized Girth Property. - Watid Phakphisut; Patanasak Prompakdee; Pornchai Supnithi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

Decoding algorithm of LDPC codes for cascaded BSC-AWGN channels. - Watid Phakphisut; Pornchai Supnithi (APSIPA, 2014)

Read Voltage Optimization in MLC NAND Flash Memory via the Density Evolution. - Chatuporn Duangthong; Watid Phakphisut; Pornchai Supnithi (ICT, 2019)

Sliding-Window Processing of Turbo Equalization for Partial Response Channels. - Sirawit Khittiwitchayakul; Watid Phakphisut; Pornchai Supnithi (ICT, 2019)

Sliding-Window Turbo Equalization and Its Reduced-Complexity Decoding Techniques. - Sirawit Khittiwitchayakul; Watid Phakphisut (IEEE Access, 2022)

Integer programming-based non-uniform window decoding schedules for spatially coupled low-density parity-check codes. - Sirawit Khittiwitchayakul; Watid Phakphisut; Pornchai Supnithi (IET Commun., 2022)

Efficient Design of Read Voltages and LDPC Codes in NAND Flash Memory Using Density Evolution. - Chatuporn Duangthong; Watid Phakphisut; Paramote Wardkein (IEEE Access, 2023)

Deep Learning Aided Robust RSRP Prediction in Cellular Networks. - Tanutsorn Wongphatcharatham; Watid Phakphisut; Tanun Jaruvitayakovit; Amnart Boonkajay; Jiajia Huang (VTC Fall, 2024)