A fuzzy logic controller with reconfigurable, cascadable architecture. - Wayne D. Dettloff; Kathy E. Yount; Hiroyuki Watanabe (ICCD, 1989)

The Omnitest System: A No-Generate, No-Compile, Interactive Test Methodology. - Wayne D. Dettloff; Melodie D. Tebbs (ITC, 1989)

A VLSI fuzzy logic controller with reconfigurable, cascadable architecture. - Hiroyuki Watanabe; Wayne D. Dettloff; Kathy E. Yount (IEEE J. Solid State Circuits, 1990)

BioSCAN: A VLSI-Based System for Biosequence Analysis. - C. Thomas White; Raj K. Singh; Peter B. Reintjes; Jordan Lampe; Bruce W. Erickson; Wayne D. Dettloff; Vernon L. Chi; Stephen F. Altschul (ICCD, 1991)

VLSI Fuzzy Chip and Inference Accelerator Board Systems. - Hiroyuki Watanabe; James R. Symon; Wayne D. Dettloff; Kathy E. Yount (ISMVL, 1991)

A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI. - Wayne D. Dettloff; John C. Eble; Lei Luo 006; Pravin Kumar Venkatesan; Fred Heaton; Teva Stone; Barry Daly (ISSCC, 2010)

A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques. - Jared Zerbe; Barry Daly; Lei Luo 006; Bill Stonecypher; Wayne D. Dettloff; John C. Eble; Teva Stone; Jihong Ren; Brian S. Leibowitz; Michael Bucher; Patrick Satarzadeh; Qi Lin; et al. (IEEE J. Solid State Circuits, 2011)

A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching. - Masum Hossain; Kambiz Kaviani; Barry Daly; Makarand Shirasgaonkar; Wayne D. Dettloff; Teva Stone; Kashinath Prabhu; Brian Tsang; John C. Eble; Jared Zerbe (CICC, 2012)

A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems. - Kambiz Kaviani; Michael Bucher; Bruce Su; Barry Daly; Bill Stonecypher; Wayne D. Dettloff; Teva Stone; Kashinath Prabhu; Pravin Kumar Venkatesan; Fred Heaton; Ravi T. Kollipara; Yi Lu; et al. (ISSCC, 2013)

A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems. - Michael Bucher; Ravi T. Kollipara; Bruce Su; Liji Gopalakrishnan; Kashinath Prabhu; Pravin Kumar Venkatesan; Kambiz Kaviani; Barry Daly; William F. Stonecypher; Wayne D. Dettloff; Teva Stone; Fred Heaton; et al. (IEEE J. Solid State Circuits, 2014)