Applying RFID to reduce delay in import cargo customs clearance process. - Chaug-Ing Hsu; Hsien-Hung Shih; Wei-Che Wang (Comput. Ind. Eng., 2009)

Efficient layout generation and evaluation of vertical channel devices. - Wei-Che Wang; Puneet Gupta 001 (ICCAD, 2014)

LEDPUF: Stability-guaranteed physical unclonable functions through locally enhanced defectivity. - Wei-Che Wang; Yair Yona; Suhas N. Diggavi; Puneet Gupta 001 (HOST, 2016)

Efficient Layout Generation and Design Evaluation of Vertical Channel Devices. - Wei-Che Wang; Puneet Gupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Implementation of stable PUFs using gate oxide breakdown. - Wei-Che Wang; Yair Yona; Yizhang Wu; Szu-Yao Hung; Suhas N. Diggavi; Puneet Gupta 001 (AsianHOST, 2017)

UNBIAS PUF: A Physical Implementation Bias Agnostic Strong PUF. - Wei-Che Wang; Zhuoqi Li; Joseph P. Skudlarek; Mario Larouche; Michael Chen; Puneet Gupta (CoRR, 2017)

Implementation and Analysis of Stable PUFs Using Gate Oxide Breakdown. - Wei-Che Wang; Yair Yona; Yizhang Wu; Suhas N. Diggavi; Puneet Gupta 001 (CoRR, 2018)

Assessing Layout Density Benefits of Vertical Channel Devices. - Wei-Che Wang; Charles Zhao; Puneet Gupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Design and Analysis of Stability-Guaranteed PUFs. - Wei-Che Wang; Yair Yona; Suhas N. Diggavi; Puneet Gupta 001 (IEEE Trans. Inf. Forensics Secur., 2018)

Hardware-Enabled Design For Security (DFS) Solution. - Wei-Che Wang (2018)

Reverse Engineering for 2.5-D Split Manufactured ICs. - Wei-Che Wang; Yizhang Wu; Puneet Gupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

SLATE: A Secure Lightweight Entity Authentication Hardware Primitive. - Wei-Che Wang; Yair Yona; Yizhang Wu; Suhas N. Diggavi; Puneet Gupta 001 (IEEE Trans. Inf. Forensics Secur., 2020)

Legal, Policy, and Compliance Issues in Using AI for Security: Using Taiwan's Cybersecurity Management Act and Penetration Testing as Examples. - Wei-Che Wang (CyCon, 2024)