Design space exploration for minimizing multi-project wafer production cost. - Rung-Bin Lin; Meng-Chiou Wu; Wei-Chiu Tseng; Ming-Hsine Kuo; Tsai-Ying Lin; Shr-Cheng Tsai (ASP-DAC, 2006)

Router and cell library co-development for improving redundant via insertion at pins. - Wei-Chiu Tseng; Yu-Hsing Chen; Rung-Bin Lin (ICCD, 2008)

Context-aware Post Routing Redundant Via Insertion. - Po-Heng Chu; Rung-Bin Lin; Da-Wei Hsu; Yu-Hsing Chen; Wei-Chiu Tseng (ISVLSI, 2009)