A dual-phase charge pump regulator with nano-ampere switched-capacitor CMOS voltage reference for achieving low output ripples. - Yean-Kuo Luo; Ke-Horng Chen; Wei-Chou Hsu (ICECS, 2008)

Low power design of phase-change memory based on a comprehensive model. - Meng-Hsueh Chiang; Yi-Bo Liao; Jun-Tin Lin; Wei-Chou Hsu; Chu Yu; Pei-Chia Chiang; Y.-Y. Hsu; W.-H. Liu; Shyh-Shyuan Sheu; Keng-Li Su; Ming-Jer Kao; Ming-Jinn Tsai (IET Comput. Digit. Tech., 2010)

Assessment of structure variation in silicon nanowire FETs and impact on SRAM. - Yi-Bo Liao; Meng-Hsueh Chiang; Keunwoo Kim; Wei-Chou Hsu (Microelectron. J., 2012)

Liquid Crystal Display (LCD) Supplied by Highly Integrated Dual-Side Dual-Output Switched-Capacitor DC-DC Converter With Only Two Flying Capacitors. - Yang-Ching Lin; Yean-Kuo Luo; Ke-Horng Chen; Wei-Chou Hsu (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

6-T SRAM performance assessment with stacked silicon nanowire MOSFETs. - Ya-Chi Huang; Meng-Hsueh Chiang; Wei-Chou Hsu; Shiou-Ying Cheng (ISQED, 2015)

Normally-Off InAlN/GaN Fin-MOSHEMT with Fluorine Treatment. - Yi-Ping Huang; Ching-Sung Lee; Wei-Chou Hsu (DRC, 2020)

MOSFET Characterization with Reduced Supply Voltage at Low Temperatures for Power Efficiency Maximization. - W.-C. Lin; H.-P. Huang; Kuo-Hsing Kao; Meng-Hsueh Chiang; Darsen D. Lu; Wei-Chou Hsu; Yeong-Her Wang; William Cheng-Yu Ma; Hann-Huei Tsai; Y.-J. Lee; H.-L. Chiang; J.-F. Wang; et al. (ESSDERC, 2023)

Investigations on In₀.₁₂Al₀.₈₈N/AlN/AlₓGa₁-ₓN/In₀.₁₂Al₀.₈₈N MOS-HFETs With Symmetrically-Graded Wide-Gap Channel and Drain Field-Plate Design. - Jian-Hong Ke; Ching-Sung Lee; Han-Yin Liu; Jung-Hui Tsai; Wei-Chou Hsu (IEEE Access, 2024)