On the Use of Registers vs. Cache to Minimize Memory Traffic. - James R. Goodman; Wei-Chung Hsu (ISCA, 1986)

WISQ: A Restartable Architecture Using Queues. - Andrew R. Pleszkun; James R. Goodman; Wei-Chung Hsu; R. T. Joersz; George E. Bier; Philip J. Woest; P. B. Schechter (ISCA, 1987)

Code scheduling and register allocation in large basic blocks. - James R. Goodman; Wei-Chung Hsu (ICS, 1988)

On the Minimization of Loads/Stores in Local Register Allocation. - Wei-Chung Hsu; Charles N. Fischer; James R. Goodman (IEEE Trans. Software Eng., 1989)

Exploitation of operation-level parallelism in a processor of the CRAY X-MP. - Sriram Vajapeyam; Gurindar S. Sohi; Wei-Chung Hsu (ICCD, 1990)

Future general purpose supercomputer architectures. - James E. Smith; Wei-Chung Hsu; Christopher C. Hsiung (SC, 1990)

The use of intermediate memories for low-latency memory access in supercomputer scalar units. - Gurindar S. Sohi; Wei-Chung Hsu (J. Supercomput., 1990)

An Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks. - Sriram Vajapeyam; Gurindar S. Sohi; Wei-Chung Hsu (ISCA, 1991)

On the instruction-level characteristics of scalar code in highly-vectorized scientific applications. - Sriram Vajapeyam; Wei-Chung Hsu (MICRO, 1992)

Prefetching in Supercomputer Instruction Caches. - James E. Smith; Wei-Chung Hsu (SC, 1992)

Performance of Cached DRAM Organizations in Vector Supercomputers. - Wei-Chung Hsu; James E. Smith (ISCA, 1993)

Toward Effective Scalar Hardware for Highly Vectorizable Applications. - Sriram Vajapeyam; Wei-Chung Hsu (J. Parallel Distributed Comput., 1993)

Instruction Scheduling for the HP PA-8000. - David A. Dunn; Wei-Chung Hsu (MICRO, 1996)

Data Prefetching on the HP PA-8000. - Vatsa Santhanam; Edward H. Gornish; Wei-Chung Hsu (ISCA, 1997)

A Performance Study of Instruction Cache Prefetching Methods. - Wei-Chung Hsu; James E. Smith (IEEE Trans. Computers, 1998)

On the Predictability of Program Behavior Using Different Input Data Sets. - Wei-Chung Hsu; Howard Chen 002; Pen-Chung Yew; Dong-yuan Chen (Interaction between Compilers and Computer Architectures, 2002)

On the Impact of Naming Methods for Heap-Oriented Pointers in C Programs. - Tong Chen 010; Jin Lin; Wei-Chung Hsu; Pen-Chung Yew (ISPAN, 2002)

An Empirical Study on the Granularity of Pointer Analysis in C Programs. - Tong Chen 010; Jin Lin; Wei-Chung Hsu; Pen-Chung Yew (LCPC, 2002)

Dynamic Trace Selection Using Performance Monitoring Hardware Sampling. - Howard Chen 002; Wei-Chung Hsu; Dong-yuan Chen (CGO, 2003)

Speculative Register Promotion Using Advanced Load Address Table (ALAT). - Jin Lin; Tong Chen 010; Wei-Chung Hsu; Pen-Chung Yew (CGO, 2003)

The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System. - Jiwei Lu; Howard Chen 002; Rao Fu; Wei-Chung Hsu; Bobbie Othmer; Pen-Chung Yew; Dong-yuan Chen (MICRO, 2003)

A compiler framework for speculative analysis and optimizations. - Jin Lin; Tong Chen 010; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai; Sun Chan (PLDI, 2003)

A Compiler Framework for Recovery Code Generation in General Speculative Optimizations. - Jin Lin; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai (IEEE PACT, 2004)

Continuous Adaptive Object-Code Re-optimization Framework. - Howard Chen 002; Jiwei Lu; Wei-Chung Hsu; Pen-Chung Yew (Asia-Pacific Computer Systems Architecture Conference, 2004)

Data Dependence Profiling for Speculative Optimizations. - Tong Chen 010; Jin Lin; Xiaoru Dai; Wei-Chung Hsu; Pen-Chung Yew (CC, 2004)

Design and Implementation of a Lightweight Dynamic Optimization System. - Jiwei Lu; Howard Chen 002; Pen-Chung Yew; Wei-Chung Hsu (J. Instr. Level Parallelism, 2004)

A compiler framework for speculative optimizations. - Jin Lin; Tong Chen 010; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai; Sun Chan (ACM Trans. Archit. Code Optim., 2004)

A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion. - Xiaoru Dai; Antonia Zhai; Wei-Chung Hsu; Pen-Chung Yew (CGO, 2005)

Performance of Runtime Optimization on BLAST. - Abhinav Das; Jiwei Lu; Howard Chen 002; Jinpyo Kim; Pen-Chung Yew; Wei-Chung Hsu; Dong-yuan Chen (CGO, 2005)

Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations. - Jinpyo Kim; Sreekumar V. Kodakara; Wei-Chung Hsu; David J. Lilja; Pen-Chung Yew (HiPEAC, 2005)

Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor. - Jiwei Lu; Abhinav Das; Wei-Chung Hsu; Khoa Nguyen; Santosh G. Abraham (MICRO, 2005)

Issues and Support for Dynamic Register Allocation. - Abhinav Das; Rao Fu; Antonia Zhai; Wei-Chung Hsu (Asia-Pacific Computer Systems Architecture Conference, 2006)

A Study of the Performance Potential for Dynamic Instruction Hints Selection. - Rao Fu; Jiwei Lu; Antonia Zhai; Wei-Chung Hsu (Asia-Pacific Computer Systems Architecture Conference, 2006)

Region Monitoring for Local Phase Detection in Dynamic Optimization Systems. - Abhinav Das; Jiwei Lu; Wei-Chung Hsu (CGO, 2006)

Supporting Speculative Multithreading on Simultaneous Multithreaded Processors. - Venkatesan Packirisamy; Shengyue Wang; Antonia Zhai; Wei-Chung Hsu; Pen-Chung Yew (HiPC, 2006)

Recovery code generation for general speculative optimizations. - Jin Lin; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai (ACM Trans. Archit. Code Optim., 2006)

Entropy-Based Profile Characterization and Classification for Automatic Profile Management. - Jinpyo Kim; Wei-Chung Hsu; Pen-Chung Yew; Sreekumar R. Nair; Robert Y. Geva (Asia-Pacific Computer Systems Architecture Conference, 2007)

COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications. - Jinpyo Kim; Wei-Chung Hsu; Pen-Chung Yew (ICPP, 2007)

An Architecture for the Interoperability of Multimedia Messaging Services between GPRS and PHS Cellular Networks. - Wen-Chuan Hsieh; Wei-Chung Hsu; Yu-Yuan Hsu (IIH-MSP, 2007)

Analysis of Statistical Sampling in Microarchitecture Simulation: Metric, Methodology and Program Characterization. - Sreekumar V. Kodakara; Jinpyo Kim; David J. Lilja; Wei-Chung Hsu; Pen-Chung Yew (IISWC, 2007)

CIM: A Reliable Metric for Evaluating Program Phase Classifications. - Sreekumar V. Kodakara; Jinpyo Kim; David J. Lilja; Douglas M. Hawkins; Wei-Chung Hsu; Pen-Chung Yew (IEEE Comput. Archit. Lett., 2007)

08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation. - Erik R. Altman; Bruce R. Childers; Robert S. Cohn; Jack W. Davidson; Koen De Bosschere; Bjorn De Sutter; M. Anton Ertl; Michael Franz; Yuan Xiang Gu; Matthias Hauswirth; Thomas Heinz 001; Wei-Chung Hsu; et al. (Emerging Uses and Paradigms for Dynamic Binary Translation, 2008)

Sufficient sunlight supply for home care using local closed-loop shutter control system. - Chao-Hung Chen; Hsiung-Cheng Lin; Ying-Chu Liu; Wei-Chung Hsu; Shin-Ming Chang (SMC, 2008)

An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems. - Jianjun Li; Chenggang Wu 002; Wei-Chung Hsu (CGO, 2009)

Reducing Code Size by Graph Coloring Register Allocation and Assignment Algorithm for Mixed-Width ISA Processor. - Jyh-Shian Wang; I-Wei Wu; Yu-Sheng Chen; Jean Jyh-Jiun Shann; Wei-Chung Hsu (CSE (2), 2009)

Dynamic performance tuning for speculative threads. - Yangchun Luo; Venkatesan Packirisamy; Wei-Chung Hsu; Antonia Zhai; Nikhil Mungre; Ankit Tarkas (ISCA, 2009)

Exploring speculative parallelism in SPEC2006. - Venkatesan Packirisamy; Antonia Zhai; Wei-Chung Hsu; Pen-Chung Yew; Tin-Fook Ngai (ISPASS, 2009)

Energy efficient speculative threads: dynamic thread allocation in Same-ISA heterogeneous multicore systems. - Yangchun Luo; Venkatesan Packirisamy; Wei-Chung Hsu; Antonia Zhai (PACT, 2010)

Local-loop based robot action control module using independent microprocessors. - Chao-Hung Chen; Hsiung-Cheng Lin; Ying-Chu Liu; Wei-Chung Hsu (Comput. Appl. Eng. Educ., 2010)

A method-based ahead-of-time compiler for android applications. - Chih-Sheng Wang; Guillermo A. Pérez 001; Yeh-Ching Chung; Wei-Chung Hsu; Wei-Kuan Shih; Hong-Rong Hsu (CASES, 2011)

Dynamic register promotion of stack variables. - Jianjun Li; Chenggang Wu 002; Wei-Chung Hsu (CGO, 2011)

PQEMU: A Parallel System Emulator Based on QEMU. - Jiun-Hung Ding; Po-Chun Chang; Wei-Chung Hsu; Yeh-Ching Chung (ICPADS, 2011)

LnQ: Building High Performance Dynamic Binary Translators with Existing Compiler Backends. - Chun-Chen Hsu; Pangfeng Liu; Chien-Min Wang; Jan-Jan Wu; Ding-Yong Hong; Pen-Chung Yew; Wei-Chung Hsu (ICPP, 2011)

Efficient and effective misaligned data access handling in a dynamic binary translation system. - Jianjun Li; Chenggang Wu 002; Wei-Chung Hsu (ACM Trans. Archit. Code Optim., 2011)

A hybrid just-in-time compiler for android: comparing JIT types and the result of cooperation. - Guillermo A. Pérez 001; Chung-Min Kao; Yeh-Ching Chung; Wei-Chung Hsu (CASES, 2012)

LLBT: an LLVM-based static binary translator. - Bor-Yeh Shen; Jiunn-Yeu Chen; Wei-Chung Hsu; Wuu Yang (CASES, 2012)

HQEMU: a multi-threaded and retargetable dynamic binary translator on multicores. - Ding-Yong Hong; Chun-Chen Hsu; Pen-Chung Yew; Jan-Jan Wu; Wei-Chung Hsu; Pangfeng Liu; Chien-Min Wang; Yeh-Ching Chung (CGO, 2012)

An LLVM-based hybrid binary translation system. - Bor-Yeh Shen; Jyun-Yan You; Wuu Yang; Wei-Chung Hsu (SIES, 2012)

Design of communication interface and control system for intelligent humanoid robot. - Hsiung-Cheng Lin; Chao-Hung Chen; Guo-Shing Huang; Ying-Chu Liu; Wei-Chung Hsu (Comput. Appl. Eng. Educ., 2012)

Effectiveness of Compiler-Directed Prefetching on Data Mining Benchmarks. - Ragavendra Natarajan; Vineeth Mekkat; Wei-Chung Hsu; Antonia Zhai (J. Circuits Syst. Comput., 2012)

Effective code discovery for ARM/Thumb mixed ISA binaries in a static binary translator. - Jiunn-Yeu Chen; Bor-Yeh Shen; Quan-Huei Ou; Wuu Yang; Wei-Chung Hsu (CASES, 2013)

Improving dynamic binary optimization through early-exit guided code region formation. - Chun-Chen Hsu; Pangfeng Liu; Jan-Jan Wu; Pen-Chung Yew; Ding-Yong Hong; Wei-Chung Hsu; Chien-Min Wang (VEE, 2013)

The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution. - Yangchun Luo; Wei-Chung Hsu; Antonia Zhai (ACM Trans. Archit. Code Optim., 2013)

Dynamic and Adaptive Calling Context Encoding. - Jianjun Li; Zhenjiang Wang; Chenggang Wu 002; Wei-Chung Hsu; Di Xu (CGO, 2014)

HSAemu - A full system emulator for HSA platforms. - Jiun-Hung Ding; Wei-Chung Hsu; BaiCheng Jeng; Shih-Hao Hung; Yeh-Ching Chung (CODES+ISSS, 2014)

Author retrospective for code scheduling and register allocation in large basic blocks. - James R. Goodman; Wei-Chung Hsu (ICS 25th Anniversary, 2014)

An Adaptive Heterogeneous Runtime for Irregular Applications in the Case of Ray-Tracing (Extended Abstract). - Chih-Chen Kao; Wei-Chung Hsu (NPC, 2014)

Efficient memory virtualization for Cross-ISA system mode emulation. - Chao-Rui Chang; Jan-Jan Wu; Wei-Chung Hsu; Pangfeng Liu; Pen-Chung Yew (VEE, 2014)

DBILL: an efficient and retargetable dynamic binary instrumentation framework using llvm backend. - Yi-Hong Lyu; Ding-Yong Hong; Tai-Yi Wu; Jan-Jan Wu; Wei-Chung Hsu; Pangfeng Liu; Pen-Chung Yew (VEE, 2014)

A Retargetable Static Binary Translator for the ARM Architecture. - Bor-Yeh Shen; Wei-Chung Hsu; Wuu Yang (ACM Trans. Archit. Code Optim., 2014)

Extended Instruction Exploration for Multiple-Issue Architectures. - I-Wei Wu; Jean Jyh-Jiun Shann; Wei-Chung Hsu; Chung-Ping Chung (ACM Trans. Embed. Comput. Syst., 2014)

Efficient and Retargetable Dynamic Binary Translation on Multicores. - Ding-Yong Hong; Jan-Jan Wu; Pen-Chung Yew; Wei-Chung Hsu; Chun-Chen Hsu; Pangfeng Liu; Chien-Min Wang; Yeh-Ching Chung (IEEE Trans. Parallel Distributed Syst., 2014)

Improving SIMD code generation in QEMU. - Sheng-Yu Fu; Jan-Jan Wu; Wei-Chung Hsu (DATE, 2015)

Runtime techniques for efficient Ray-Tracing on heterogeneous systems. - Chih-Chen Kao; Wei-Chung Hsu (DSP, 2015)

SIMD Code Translation in an Enhanced HQEMU. - Sheng-Yu Fu; Ding-Yong Hong; Jan-Jan Wu; Pangfeng Liu; Wei-Chung Hsu (ICPADS, 2015)

HSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines. - Zhe Wang 017; Jianjun Li; Chenggang Wu 002; Dongyan Yang; Zhenjiang Wang; Wei-Chung Hsu; Bin Li; Yong Guan (VEE, 2015)

Automatic validation for binary translation. - Jiunn-Yeu Chen; Wuu Yang; Bor-Yeh Shen; Yuan-Jia Li; Wei-Chung Hsu (Comput. Lang. Syst. Struct., 2015)

A dynamic binary translation system in a client/server environment. - Chun-Chen Hsu; Ding-Yong Hong; Wei-Chung Hsu; Pangfeng Liu; Jan-Jan Wu (J. Syst. Archit., 2015)

An Adaptive Heterogeneous Runtime Framework for Irregular Applications. - Chih-Chen Kao; Wei-Chung Hsu (J. Signal Process. Syst., 2015)

A pipeline-based runtime technique for improving Ray-Tracing on HSA-compliant systems. - Chih-Chen Kao; Yu-Tsung Miao; Wei-Chung Hsu (ICME, 2016)

Exploiting Longer SIMD Lanes in Dynamic Binary Translation. - Ding-Yong Hong; Sheng-Yu Fu; Yu-Ping Liu; Jan-Jan Wu; Wei-Chung Hsu (ICPADS, 2016)

HSAemu 2.0: Full System Emulation for HSA platforms with Soft-MMU. - Hao-Che Hsu; Chih Wei Yeh; Shih-Hao Hung; Wei-Chung Hsu; Chung-Ta King; Yeh-Ching Chung (RACS, 2016)

Building a KVM-based Hypervisor for a Heterogeneous System Architecture Compliant System. - Yu-Ju Huang; Hsuan-Heng Wu; Yeh-Ching Chung; Wei-Chung Hsu (VEE, 2016)

Optimizing Control Transfer and Memory Virtualization in Full System Emulators. - Ding-Yong Hong; Chun-Chen Hsu; Cheng-Yi Chou; Wei-Chung Hsu; Pangfeng Liu; Jan-Jan Wu (ACM Trans. Archit. Code Optim., 2016)

Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation. - Yu-Ping Liu; Ding-Yong Hong; Jan-Jan Wu; Sheng-Yu Fu; Wei-Chung Hsu (PACT, 2017)

Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions. - Sheng-Yu Fu; Ding-Yong Hong; Yu-Ping Liu; Jan-Jan Wu; Wei-Chung Hsu (LCTES, 2017)

Efficient Synthetic Light Field Rendering on Heterogeneous Systems Using a Pipeline-Based Runtime Design. - Chih-Chen Kao; Liang-Chi Tseng; Wei-Chung Hsu (RACS, 2017)

Adaptive runtime exploiting sparsity in tensor of deep learning neural network on heterogeneous systems. - Kuo-You Peng; Sheng-Yu Fu; Yu-Ping Liu; Wei-Chung Hsu (SAMOS, 2017)

ReRanz: A Light-Weight Virtual Machine to Mitigate Memory Disclosure Attacks. - Zhe Wang 017; Chenggang Wu 002; Jianjun Li; Yuanming Lai; Xiangyu Zhang 001; Wei-Chung Hsu; Yueqiang Cheng (VEE, 2017)

On Static Binary Translation of ARM/Thumb Mixed ISA Binaries. - Jiunn-Yeu Chen; Wuu Yang; Wei-Chung Hsu; Bor-Yeh Shen; Quan-Huei Ou (ACM Trans. Embed. Comput. Syst., 2017)

A Pipeline-Based Ray-Tracing Runtime System for HSA-Compliant Frameworks. - Chih-Chen Kao; Yu-Tsung Miao; Wei-Chung Hsu (IEEE Trans. Multim., 2017)

Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator. - Sheng-Yu Fu; Chih-Min Lin; Ding-Yong Hong; Yu-Ping Liu; Jan-Jan Wu; Wei-Chung Hsu (CASES, 2018)

Automatically Migrating Sequential Applications to Heterogeneous System Architecture. - Chih-Yung Liang; Sheng-Yu Fu; Yu-Ping Liu; Wei-Chung Hsu (HPCS, 2018)

Dynamic tuning of applications using restricted transactional memory. - Shih-Kai Lin; Ding-Yong Hong; Sheng-Yu Fu; Jan-Jan Wu; Wei-Chung Hsu (RACS, 2018)

Efficient synthetic light field generation using adaptive multi-level rendering. - Liang-Chi Tseng; Wei-Chung Hsu (RACS, 2018)

Efficient and retargetable SIMD translation in a dynamic binary translator. - Sheng-Yu Fu; Ding-Yong Hong; Yu-Ping Liu; Jan-Jan Wu; Wei-Chung Hsu (Softw. Pract. Exp., 2018)

Improving SIMD Parallelism via Dynamic Binary Translation. - Ding-Yong Hong; Yu-Ping Liu; Sheng-Yu Fu; Jan-Jan Wu; Wei-Chung Hsu (ACM Trans. Embed. Comput. Syst., 2018)

Exploring hidden coherency of Ray-Tracing for heterogeneous systems using online feedback methodology. - Chih-Chen Kao; Wei-Chung Hsu (Vis. Comput., 2018)

Translating Traditional SIMD Instructions to Vector Length Agnostic Architectures. - Sheng-Yu Fu; Wei-Chung Hsu (CGO, 2019)

Exploiting Vector Processing in Dynamic Binary Translation. - Chih-Min Lin; Sheng-Yu Fu; Ding-Yong Hong; Yu-Ping Liu; Jan-Jan Wu; Wei-Chung Hsu (ICPP, 2019)

Efficient Dynamic Device Placement for Deep Neural Network Training on Heterogeneous Systems. - Zi Xuan Huang; Sheng-Yu Fu; Wei-Chung Hsu (SAMOS, 2019)

Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator. - Sheng-Yu Fu; Ding-Yong Hong; Yu-Ping Liu; Jan-Jan Wu; Wei-Chung Hsu (J. Syst. Archit., 2019)

Processor-Tracing Guided Region Formation in Dynamic Binary Translation. - Ding-Yong Hong; Jan-Jan Wu; Yu-Ping Liu; Sheng-Yu Fu; Wei-Chung Hsu (ACM Trans. Archit. Code Optim., 2019)

Exploiting SIMD Asymmetry in ARM-to-x86 Dynamic Binary Translation. - Yu-Ping Liu; Ding-Yong Hong; Jan-Jan Wu; Sheng-Yu Fu; Wei-Chung Hsu (ACM Trans. Archit. Code Optim., 2019)

Intra- and Inter- Layer Transformation to Reduce Memory Traffic for CNN Computation. - Pin-Wei Liao; Wei-Chung Hsu; Shih-Wei Liao (ICPP Workshops, 2021)

Efficient Video Captioning on Heterogeneous System Architectures. - Horng-Ruey Huang; Ding-Yong Hong; Jan-Jan Wu; Pangfeng Liu; Wei-Chung Hsu (IPDPS, 2021)

Accelerating Convolutional Neural Networks via Inter-operator Scheduling. - Yi You; Pangfeng Liu; Ding-Yong Hong; Jan-Jan Wu; Wei-Chung Hsu (ICPADS, 2022)

Accelerating Video Captioning on Heterogeneous System Architectures. - Horng-Ruey Huang; Ding-Yong Hong; Jan-Jan Wu; Kung-Fu Chen; Pangfeng Liu; Wei-Chung Hsu (ACM Trans. Archit. Code Optim., 2022)

MultiFuse: Efficient Cross Layer Fusion for DNN Accelerators with Multi-level Memory Hierarchy. - Chia-Wei Chang; Jing-Jia Liou; Chih-Tsun Huang; Wei-Chung Hsu; Juin-Ming Lu (ICCD, 2023)

An Automatic Facial Analysis System for The Detection of Pediatric Obstructive Sleep Apnea. - Chia-Jo Lin; Shih-Hsu Huang; Wan-Yi Hsueh; Wei-Chung Hsu; Chih-Wen Su (ICCE-Taiwan, 2023)