Compiler Directed Data Locality Optimization for Multicore Architectures. - Wei Ding 008; Jithendra Srinivas; Mahmut T. Kandemir; Mustafa Karaköy (PACT, 2011)

Optimizing Data Layouts for Parallel Computation on Multicores. - Yuanrui Zhang; Wei Ding 008; Jun Liu 008; Mahmut T. Kandemir (PACT, 2011)

On-chip cache hierarchy-aware tile scheduling for multicore machines. - Jun Liu 008; Yuanrui Zhang; Wei Ding 008; Mahmut T. Kandemir (CGO, 2011)

Optimizing data locality using array tiling. - Wei Ding 008; Yuanrui Zhang; Jun Liu 008; Mahmut T. Kandemir (ICCAD, 2011)

Exploring heterogeneous NoC design space. - Hui Zhao 013; Mahmut T. Kandemir; Wei Ding 008; Mary Jane Irwin (ICCAD, 2011)

A data layout optimization framework for NUCA-based multicores. - Yuanrui Zhang; Wei Ding 008; Mahmut T. Kandemir; Jun Liu 008; Ohyoung Jang (MICRO, 2011)

Off-chip access localization for NoC-based multicores. - Wei Ding 008; Mahmut T. Kandemir; Yuanrui Zhang; Emre Kultursay (PACT, 2012)

A hybrid NoC design for cache coherence optimization for chip multiprocessors. - Hui Zhao 013; Ohyoung Jang; Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Mary Jane Irwin (DAC, 2012)

Improving last level cache locality by integrating loop and data transformations. - Wei Ding 008; Mahmut T. Kandemir (ICCAD, 2012)

A compiler framework for extracting superword level parallelism. - Jun Liu 008; Yuanrui Zhang; Ohyoung Jang; Wei Ding 008; Mahmut T. Kandemir (PLDI, 2012)

Reshaping cache misses to improve row-buffer locality in multicore systems. - Wei Ding 008; Jun Liu 008; Mahmut T. Kandemir; Mary Jane Irwin (PACT, 2013)

Locality-aware mapping and scheduling for multicores. - Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Jithendra Srinivas; Praveen Yedlapalli (CGO, 2013)

Data layout optimization for GPGPU architectures. - Jun Liu 008; Wei Ding 008; Ohyoung Jang; Mahmut T. Kandemir (PPoPP, 2013)

Compiler-directed file layout optimization for hierarchical storage systems. - Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Seung Woo Son 001 (Sci. Program., 2013)

Trading cache hit rate for memory performance. - Wei Ding 008; Mahmut T. Kandemir; Diana R. Guttman; Adwait Jog; Chita R. Das; Praveen Yedlapalli (PACT, 2014)

A cache topology-aware multi-query scheduler for multicore architectures. - Umut Orhan; Wei Ding 008; Praveen Yedlapalli; Mahmut T. Kandemir; Özcan Özturk 001 (IISWC, 2014)

Quantifying and Optimizing the Impact of Victim Cache Line Selection in Manycore Systems. - Mahmut T. Kandemir; Wei Ding 008; Diana R. Guttman (MASCOTS, 2014)

Compiler Support for Optimizing Memory Bank-Level Parallelism. - Wei Ding 008; Diana R. Guttman; Mahmut T. Kandemir (MICRO, 2014)

CApRI: CAche-conscious data reordering for irregular codes. - Wei Ding 008; Mahmut T. Kandemir (SIGMETRICS, 2014)

Reactive tiling. - Jithendra Srinivas; Wei Ding 008; Mahmut T. Kandemir (CGO, 2015)

Network footprint reduction through data access and computation placement in NoC-based manycores. - Jun Liu 008; Jagadish Kotra; Wei Ding 008; Mahmut T. Kandemir (DAC, 2015)

Optimizing off-chip accesses in multicores. - Wei Ding 008; Xulong Tang; Mahmut T. Kandemir; Yuanrui Zhang; Emre Kultursay (PLDI, 2015)

DEMM: A Dynamic Energy-Saving Mechanism for Multicore Memories. - Akbar Sharifi; Wei Ding 008; Diana R. Guttman; Hui Zhao 013; Xulong Tang; Mahmut T. Kandemir; Chita R. Das (MASCOTS, 2017)

Cache Hierarchy-Aware Query Mapping on Emerging Multicore Architectures. - Özcan Özturk 001; Umut Orhan; Wei Ding 008; Praveen Yedlapalli; Mahmut Taylan Kandemir (IEEE Trans. Computers, 2017)