ModelDB: a system for machine learning model management. - Manasi Vartak; Harihar Subramanyam; Wei-En Lee; Srinidhi Viswanathan; Saadiyah Husnoo; Samuel Madden 001; Matei Zaharia (HILDA@SIGMOD, 2016)

A Single-Comparator Active Rectifier with Auto-Calibration in 0.18-μm CMOS. - Chi-An Li; Wei-En Lee; Chi-Huan Lu; Sheng-Ying Lin; Tsung-Hsien Lin (ISCAS, 2020)

A CMOS Temperature Sensor Based on a Chopped Continuous-Time Delta-Sigma Modulator. - Po-Yu Li; Wei-En Lee; Ching-Tzung Lin; Li-Te Wu; Tsung-Hsien Lin (VLSI-DAT, 2020)

Intelligent Wireless EEG Measurement System With Electrical and Optogenetic Stimulation for Epileptic Seizure Detection and Suppression. - Wei-En Lee; Chieh Tsou; Zhan-Xian Liao; Po-Yen Lu; Tsung-Hsien Lin; Shuenn-Yuh Lee; Chou-Ching K. Lin; Gia-Shing Shieh (IEEE Access, 2021)

A 0.6-V 12-bit Set-and-Down SAR ADC With a DAC-Based Bypass Window Switching Method. - Wei-En Lee; Tsung-Hsien Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

An 82dB-SNDR Input-Driving-Relaxed Noise-Shaping SAR with Amplifier-Reused In-Loop Buffering and NTF Leakage Reshaping. - Tian Xie 006; Ken Li; Tzu-Han Wang; Wei-En Lee; Engin Esen; Dong Suk Kang; Shaolan Li (CICC, 2024)

A 95.9-dB SNDR 10-kHz BW 3rd-Order VCO-Based CT ΔΣ Modulator Using a Phase-Time Two-Step Quantizer. - Ken Li; Wei-En Lee; Xitie Zhang; Tian Xie 006; Tzu-Han Wang; Visvesh Sathe 001; Shaolan Li (CICC, 2025)

A 32-Channel 85.4dB SNDR Time-multiplexed Neural Recording Frontend Achieving Within-Conversion Artifact Recovery. - Arindam Mandal; Chi-Hsiang Huang 001; Julian Arenas; Wei-En Lee; Philip Anschutz; Amanda L. Jacob; Keshav Ramachandra; Samuel J. Sober; Muhannad S. Bakir; Shaolan Li; Visvesh S. Sathe 001 (CICC, 2025)

A 50-kHz BW 92.1-dB SNDR Incremental ADC Using a Back-End Sampling Two-Step NS-SAR Architecture with Concurrent Gain-Error + Noise Suppression. - Tzu-Han Wang; Chenyang Li; Dong Suk Kang; Ken Li; Xitie Zhang; Wei-En Lee; Visvesh Sathe 001; Shaolan Li (CICC, 2025)