A cross-correlation based signal detector with two-step down-converter robust to finite image rejection. - Wei-Gi Ho; Ranjit Gharpurey (ISCAS, 2011)

A frequency-folded ADC architecture with digital LO synthesis. - Travis Forbes; Wei-Gi Ho; Nan Sun 003; Ranjit Gharpurey (ISCAS, 2013)

An active interference cancellation technique with harmonic rejection for a broadband channelizer. - Wei-Gi Ho; Travis Forbes; Vineet Kumar Singh; Ranjit Gharpurey (MWSCAS, 2013)

Design and Analysis of Harmonic Rejection Mixers With Programmable LO Frequency. - Travis Forbes; Wei-Gi Ho; Ranjit Gharpurey (IEEE J. Solid State Circuits, 2013)

A 16-band channelizer employing harmonic rejection mixers with enhanced image rejection. - Vineet Kumar Singh; Travis Forbes; Wei-Gi Ho; Jaegan Ko; Ranjit Gharpurey (CICC, 2014)

A low-power two-stage harmonic rejection quadrature mixer employing bias-current reuse. - Wei-Gi Ho; Travis Forbes; Ranjit Gharpurey (MWSCAS, 2015)

A Wideband Receiver Employing PWM-Based Harmonic Rejection Downconversion. - Heechai Kang; Wei-Gi Ho; Vineet Kumar Singh; Ranjit Gharpurey (IEEE J. Solid State Circuits, 2018)

A Frequency-Folded ADC Channelizer With Digital Equalization and Relaxed Anti-Alias Filtering. - Vineet Kumar Singh; Wei-Gi Ho; Ranjit Gharpurey (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)