Design of an Instruction for Fast and Efficient S-Box Implementation. - Meifeng Li; Guanzhong Dai; Hang Liu; Wei Hu 008 (CIS, 2007)

Theoretical analysis of gate level information flow tracking. - Jason Oberg; Wei Hu 008; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Ryan Kastner (DAC, 2010)

Information flow isolation in I2C and USB. - Jason Oberg; Wei Hu 008; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Ryan Kastner (DAC, 2011)

Theoretical Fundamentals of Gate Level Information Flow Tracking. - Wei Hu 008; Jason Oberg; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Dejun Mu; Ryan Kastner (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Simultaneous information flow security and circuit redundancy in Boolean gates. - Wei Hu 008; Jason Oberg; Dejun Mu; Ryan Kastner (ICCAD, 2012)

On the Complexity of Generating Gate Level Information Flow Tracking Logic. - Wei Hu 008; Jason Oberg; Ali Irturk; Mohit Tiwari; Timothy Sherwood; Dejun Mu; Ryan Kastner (IEEE Trans. Inf. Forensics Secur., 2012)

Improvements the Seccomp Sandbox Based on PBE Theory. - Bo Ma 008; Dejun Mu; Wei Fan; Wei Hu 008 (AINA Workshops, 2013)

Towards a Moderate-Granularity Incremental Clustering Algorithm for GPU. - Chunlei Chen; Dejun Mu; Huixiang Zhang; Wei Hu 008 (CyberC, 2013)

Expanding Gate Level Information Flow Tracking for Multilevel Security. - Wei Hu 008; Jason Oberg; Janet Barrientos; Dejun Mu; Ryan Kastner (IEEE Embed. Syst. Lett., 2013)

Energy-efficient border intrusion detection using wireless sensors network. - Tao Yang 028; Dejun Mu; Wei Hu 008; Huixiang Zhang (EURASIP J. Wirel. Commun. Netw., 2014)

A bottom-up approach to verifiable embedded system information flow security. - Dejun Mu; Wei Hu 008; Baolei Mao; Bo Ma 008 (IET Inf. Secur., 2014)

Gate-Level Information Flow Tracking for Security Lattices. - Wei Hu 008; Dejun Mu; Jason Oberg; Baolei Mao; Mohit Tiwari; Timothy Sherwood; Ryan Kastner (ACM Trans. Design Autom. Electr. Syst., 2014)

Quantifying Timing-Based Information Flow in Cryptographic Hardware. - Baolei Mao; Wei Hu 008; Alric Althoff; Janarbek Matai; Jason Oberg; Dejun Mu; Timothy Sherwood; Ryan Kastner (ICCAD, 2015)

Quantifying hardware security using joint information flow analysis. - Ryan Kastner; Wei Hu 008; Alric Althoff (DATE, 2016)

Imprecise security: quality and complexity tradeoffs for hardware information flow tracking. - Wei Hu 008; Andrew Becker; Armita Ardeshiricham; Yu Tai; Paolo Ienne; Dejun Mu; Ryan Kastner (ICCAD, 2016)

Towards Property Driven Hardware Security. - Wei Hu 008; Alric Althoff; Armita Ardeshiricham; Ryan Kastner (MTV, 2016)

Generating optimized gate level information flow tracking logic for enforcing multilevel security. - Yu Tai; Wei Hu 008; Huixiang Zhang; Dejun Mu; Xing-Li Huang (Autom. Control. Comput. Sci., 2016)

Detecting Hardware Trojans with Gate-Level Information-Flow Tracking. - Wei Hu 008; Baolei Mao; Jason Oberg; Ryan Kastner (Computer, 2016)

A Simplifying Logic Approach for Gate Level Information Flow Tracking. - Yu Tai; Wei Hu 008; Dejun Mu; Baolei Mao; Lantian Guo; Maoyuan Qin (ChinaCom (2), 2017)

Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking. - Andrew Becker; Wei Hu 008; Yu Tai; Philip Brisk; Ryan Kastner; Paolo Ienne (DAC, 2017)

Register transfer level information flow tracking for provably secure hardware design. - Armaiti Ardeshiricham; Wei Hu 008; Joshua Marxen; Ryan Kastner (DATE, 2017)

Clepsydra: Modeling timing flows in hardware designs. - Armaiti Ardeshiricham; Wei Hu 008; Ryan Kastner (ICCAD, 2017)

Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans. - Wei Hu 008; Lu Zhang; Armaiti Ardeshiricham; Jeremy Blackstone; Bochuan Hou; Yu Tai; Ryan Kastner (ICCAD, 2017)

Identifying and Measuring Security Critical Path for Uncovering Circuit Vulnerabilities. - Wei Hu 008; Armaiti Ardeshiricham; Ryan Kastner (MTV, 2017)

Security Path Verification Through Joint Information Flow Analysis. - Wei Hu 008; Xinmu Wang; Dejun Mu (APCCAS, 2018)

Examining the consequences of high-level synthesis optimizations on power side-channel. - Lu Zhang; Wei Hu 008; Armaiti Ardeshiricham; Yu Tai; Jeremy Blackstone; Dejun Mu; Ryan Kastner (DATE, 2018)

Property specific information flow analysis for hardware security verification. - Wei Hu 008; Armaiti Ardeshiricham; Mustafa S. Gobulukoglu; Xinmu Wang; Ryan Kastner (ICCAD, 2018)

Property Based Formal Security Verification for Hardware Trojan Detection. - Maoyuan Qin; Wei Hu 008; Dejun Mu; Yu Tai (IVSW, 2018)

Towards Quantified Data Analysis of Information Flow Tracking for Secure System Design. - Yu Tai; Wei Hu 008; Dejun Mu; Baolei Mao; Lu Zhang (IEEE Access, 2018)

Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design. - Baolei Mao; Wei Hu 008; Alric Althoff; Janarbek Matai; Yu Tai; Dejun Mu; Timothy Sherwood; Ryan Kastner (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Leveraging Unspecified Functionality in Obfuscated Hardware for Trojan and Fault Attacks. - Wei Hu 008; Yixin Ma; Xinmu Wang; Xingxin Wang (AsianHOST, 2019)

Theorem proof based gate level information flow tracking for hardware security verification. - Maoyuan Qin; Wei Hu 008; Xinmu Wang; Dejun Mu; Baolei Mao (Comput. Secur., 2019)

Feedback-based Channel Gain Complement and Cluster-based Quantization for Physical Layer Key Generation. - Hang Liu; Chaofan Zhang; Hongming Fei; Wei Hu 008; Dawei Guo (AsianHOST, 2020)

A Unified Formal Model for Proving Security and Reliability Properties. - Wei Hu 008; Lingjuan Wu; Yu Tai; Jing Tan; Jiliang Zhang 002 (ATS, 2020)

HRAE: Hardware-assisted Randomization against Adversarial Example Attacks. - Jiliang Zhang 002; Shuang Peng 010; Yupeng Hu; Fei Peng; Wei Hu 008; Jinmei Lai 001; Jing Ye 001; Xiangqi Wang (ATS, 2020)

X-Attack: Remote Activation of Satisfiability Don't-Care Hardware Trojans on Shared FPGAs. - Dina G. Mahmoud; Wei Hu 008; Mirjana Stojilovic (FPL, 2020)

A Standardized ICS Network Data Processing Flow With Generative Model in Anomaly Detection. - Tao Yang 028; Yibo Hu 004; Yang Li 055; Wei Hu 008; Quan Pan 001 (IEEE Access, 2020)

A Unified Model for Gate Level Propagation Analysis. - Jeremy Blackstone; Wei Hu 008; Alric Althoff; Armaiti Ardeshiricham; Lu Zhang; Ryan Kastner (CoRR, 2020)

A formal model for proving hardware timing properties and identifying timing channels. - Maoyuan Qin; Xinmu Wang; Baolei Mao; Dejun Mu; Wei Hu 008 (Integr., 2020)

Machine-Learning-Based Side-Channel Leakage Detection in Electronic System-Level Synthesis. - Lu Zhang; Dejun Mu; Wei Hu 008; Yu Tai (IEEE Netw., 2020)

Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel. - Lu Zhang; Dejun Mu; Wei Hu 008; Yu Tai; Jeremy Blackstone; Ryan Kastner (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Hardware Trojan Attack in Embedded Memory. - Xinmu Wang; Tamzidul Hoque; Abhishek Basak; Robert Karam; Wei Hu 008; Maoyuan Qin; Dejun Mu; Swarup Bhunia (ACM J. Emerg. Technol. Comput. Syst., 2020)

A Correlation Fault Attack on Rotating S-Box Masking AES. - Xingxin Wang; Jian Zheng; Lingjuan Wu; Jiacheng Zhu; Wei Hu 008 (AsianHOST, 2021)

Developing Formal Models for Measuring Fault Effects Using Functional EDA Tools. - Wei Hu 008; Jing Tan; Lingjuan Wu; Yu Tai; Liang Hong (ITC-Asia, 2021)

Identifying Specious LUTs for Satisfiability Don't Care Trojan Detection. - Lingjuan Wu; Xuefei Li; Jiacheng Zhu; Jian Zheng; Wei Hu 008 (SoCC, 2021)

Accelerating hardware security verification and vulnerability detection through state space reduction. - Lixiang Shen; Dejun Mu; Guo Cao; Maoyuan Qin; Jiacheng Zhu; Wei Hu 008 (Comput. Secur., 2021)

An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools. - Wei Hu 008; Chip-Hong Chang; Anirban Sengupta; Swarup Bhunia; Ryan Kastner; Hai Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Integrating Information Flow Tracking into High-Level Synthesis Design Flow. - Wei Hu 008; Armaiti Ardeshiricham; Lingjuan Wu; Ryan Kastner (Behavioral Synthesis for Hardware Security, 2022)

Hardware Trojan Detection at LUT: Where Structural Features Meet Behavioral Characteristics. - Lingjuan Wu; Xuelin Zhang; Siyi Wang; Wei Hu 008 (HOST, 2022)

Accelerating SoC Security Verification and Vulnerability Detection Through Symbolic Execution. - Shibo Tang; Xingxin Wang; Yifei Gao; Wei Hu 008 (ISOCC, 2022)

Towards Automatic Property Generation for SoC Security Verification. - Xingxin Wang; Shibo Tang; Wei Hu 008 (ISOCC, 2022)

Hardware Information Flow Tracking. - Wei Hu 008; Armaiti Ardeshiricham; Ryan Kastner (ACM Comput. Surv., 2022)

Message from the Chairs. - Huawei Li 001; Jing Ye 001; Wei Hu 008; Jiliang Zhang 002 (ATS, 2023)

Verifying RISC-V Privilege Transition Integrity Through Symbolic Execution. - Shibo Tang; Jiacheng Zhu; Yifei Gao; Jing Zhou; Dejun Mu; Wei Hu 008 (ATS, 2023)

Security Verification of RISC-V System Based on ISA Level Information Flow Tracking. - Lingjuan Wu; Yifei Gao; Jiacheng Zhu; Yu Tai; Wei Hu 008 (ATS, 2023)

Automated Hardware Trojan Detection at LUT Using Explainable Graph Neural Networks. - Lingjuan Wu; Hao Su; Xuelin Zhang; Yu Tai; Han Li; Wei Hu 008 (ICCAD, 2023)

Maximizing Network Reliability in Large Scale Infrastructure Networks: A Heat Conduction Model Perspective. - Beibei Li; Wei Hu 008; Yiwei Li (ICMLC, 2023)

Hunting for Hardware Trojan in Gate Netlist: A Stacking Ensemble Learning Perspective. - Liang Hong; Ge Zhu; Jing Zhou; Xuefei Li; Ziyi Chen; Wei Hu 008 (ITC-Asia, 2023)

Design for Assurance: Employing Functional Verification Tools for Thwarting Hardware Trojan Threat in 3PIPs. - Wei Hu 008; Beibei Li; Lingjuan Wu; Yiwei Li; Xuefei Li; Liang Hong (CoRR, 2023)

New Diagnostics for Inferring Multiple Fault Scenarios and Accurate Fault Localization. - Huisi Zhou; Wei Hu 008; Dan Zhu 001; Liwei Wang (GLOBECOM, 2024)

LUT Level Information Flow Tracking for FPGA Design Security Verification. - Jiacheng Zhu; Wei Hu 008; Lingjuan Wu; Dan Zhu 001; Dejun Mu (GLOBECOM, 2024)

Enabling Efficient Spatio-Temporal Range Query over Encrypted Databases. - Dan Zhu 001; Xiangyu Wang 010; Cheng Huang 001; Peilin Han; Wei Hu 008; Jianfeng Ma 001 (GLOBECOM, 2024)

Path-specific Information Flow Analysis for RSA Hardware Timing Channel Security Verification. - Zezhi Wang; Baolei Mao; Shunjie Zhang; Chenxi Mao; Maoyuan Qin; Wei Hu 008 (ICCT, 2024)

Pinpointing Hardware Trojans Through Semantic Feature Extraction and Natural Language Processing. - Yichen Li; Wei Hu 008; Hao Su; Xuelin Zhang; Yizhi Zhao; Pengjun Wang; Lingjuan Wu (ITC-Asia, 2024)

Robust Hardware Trojan Detection: Conventional Machine Learning vs. Graph Learning Approaches. - Liang Hong; Xingguo Guo; Zeyar Aung; Wei Hu 008 (TrustCom, 2024)

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don't-Care Hardware Trojans to Shared Cloud FPGAs. - Dina G. Mahmoud; Beatrice Shokry; Vincent Lenders; Wei Hu 008; Mirjana Stojilovic (IEEE Access, 2024)

SAE+: One-Round Provably Secure Asymmetric SAE Protocol for Client-Server Model. - Mingping Qi; Wei Hu 008; Yu Tai (IEEE Trans. Inf. Forensics Secur., 2024)

Hardware/software security co-verification and vulnerability detection: An information flow perspective. - Maoyuan Qin; Jiacheng Zhu; Baolei Mao; Wei Hu 008 (Integr., 2024)

Provably Secure Asymmetric PAKE Protocol for Protecting IoT Access. - Mingping Qi; Wei Hu 008 (IEEE Internet Things J., 2024)

A Blockchain-Assisted Road Condition Monitoring Scheme With Privacy-Preserving for VANETs. - Lemei Da; Wei Hu 008; Yujue Wang; Yong Ding 005; Beibei Li; Dan Zhu 001 (IEEE Trans. Veh. Technol., 2024)

An Automated Fault Attack Framework for Block Ciphers Through Property Mining and Verification. - Xingxin Wang; Wei Hu 008; Shibo Tang; Xinxin Wang; Huisi Zhou (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Toward Precise and Explainable Hardware Trojan Localization at LUT Level. - Hao Su; Wei Hu 008; Xuelin Zhang; Dan Zhu 001; Lingjuan Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

DPSLS: an efficient local search algorithm for pure MaxSAT. - Huisi Zhou; Xinyu Zhang; Wei Hu 008; Dan Zhu 001; Liwei Wang (Peer Peer Netw. Appl., 2025)