Wei Huang
Affiliations:- AMD Research
- IBM Austin Research Lab (former)
- University of Virginia (former)
- University of Science and Technology of China (USTC), Hefei, Anhui Province, China (former)
According to our database1,
Wei Huang
authored at least 39 papers
between 2003 and 2023.
Collaborative distances:
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Bibliography
2023
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
2019
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
2018
Implications of Integrated CPU-GPU Processors on Thermal and Power Management Techniques.
CoRR, 2018
2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
2016
A framework for evaluating promising power efficiency techniques in future GPUs for HPC.
Proceedings of the 24th High Performance Computing Symposium, 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Workload-Aware Power Gating Design and Run-Time Management for Massively Parallel GPGPUs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016
Performance Boosting Opportunities under Communication Imbalance in Power-Constrained HPC Clusters.
Proceedings of the 45th International Conference on Parallel Processing, 2016
Proceedings of the 2016 IEEE International Conference on Cluster Computing, 2016
2015
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015
2014
PPEP: Online Performance, Power, and Energy Prediction Framework and DVFS Space Exploration.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014
2013
2012
IEEE Trans. Computers, 2012
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2011
IEEE Micro, 2011
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011
Proceedings of the 2011 International Green Computing Conference and Workshops, 2011
2010
Proceedings of the 28th International Conference on Computer Design, 2010
2009
Differentiating the roles of IR measurement and simulation for power and temperature-aware design.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009
2008
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model.
IEEE Trans. Computers, 2008
Proceedings of the 45th Design Automation Conference, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
2005
The need for a full-chip and package thermal model for thermally optimized IC designs.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
2004
ACM Trans. Archit. Code Optim., 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
2003
Microelectron. J., 2003
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003