1MS/s low power successive approximations register ADC for 67-fJ/conversion-step. - Wen-Cheng Lai; Jhin-Fang Huang; Wei-Jian Lin (APCCAS, 2012)

A time-interleaved pipelined ADC chip design for 4-G application. - Jhin-Fang Huang; Wen-Cheng Lai; Wei-Jian Lin (ICAIT, 2013)

Time-interleaved pipelined ADC design for computational intelligence and cloud computing application. - Wen-Cheng Lai; Jhin-Fang Huang; Wei-Jian Lin; Ta Chen Chiu (CCIS, 2014)

Work in process: Integrated low phase noise Colpitts quadrature voltage controlled oscillator and mixer with charge-injection for Wimax communications and wireless networking application. - Wen-Cheng Lai; Jhin-Fang Huang; Wei-Jian Lin; Fan-Tsai Kao (ChinaCom, 2014)