Behavior and communication co-optimization for systems with sequential communication media. - Jason Cong; Yiping Fan; Guoling Han; Wei Jiang 035; Zhiru Zhang (DAC, 2006)

Platform-based resource binding using a distributed register-file microarchitecture. - Jason Cong; Yiping Fan; Wei Jiang 035 (ICCAD, 2006)

Platform-Based Behavior-Level and System-Level Synthesis. - Jason Cong; Yiping Fan; Guoling Han; Wei Jiang 035; Zhiru Zhang (SoCC, 2006)

Synthesis of an application-specific soft multiprocessor system. - Jason Cong; Guoling Han; Wei Jiang 035 (FPGA, 2007)

Scheduling with integer time budgeting for low-power optimization. - Wei Jiang 035; Zhiru Zhang; Miodrag Potkonjak; Jason Cong (ASP-DAC, 2008)

Pattern-based behavior synthesis for FPGA resource reduction. - Jason Cong; Wei Jiang 035 (FPGA, 2008)

Synthesis Algorithm for Application-Specific Homogeneous Processor Networks. - Jason Cong; Karthik Gururaj; Guoling Han; Wei Jiang 035 (IEEE Trans. Very Large Scale Integr. Syst., 2009)

A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis. - Jason Cong; Hui Huang 001; Wei Jiang 035 (DATE, 2010)

Accelerating Monte Carlo based SSTA using FPGA. - Jason Cong; Karthik Gururaj; Wei Jiang 035; Bin Liu 006; Kirill Minkovich; Bo Yuan; Yi Zou (FPGA, 2010)

Pattern-Mining for Behavioral Synthesis. - Jason Cong; Hui Huang 001; Wei Jiang 035 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Automatic memory partitioning and scheduling for throughput and power optimization. - Jason Cong; Wei Jiang 035; Bin Liu 006; Yi Zou (ACM Trans. Design Autom. Electr. Syst., 2011)