Wei Jin
Orcid: 0000-0001-5108-5233Affiliations:
- Shanghai Jiao Tong University, School of Microelectronics, China
According to our database1,
Wei Jin
authored at least 10 papers
between 2011 and 2017.
Collaborative distances:
Collaborative distances:
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Bibliography
2017
In Situ Error Detection Techniques in Ultralow Voltage Pipelines: Analysis and Optimizations.
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE J. Solid State Circuits, 2017
A 0.33 V 2.5 μW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS.
Integr., 2017
Integr., 2017
A 0.2V 2.3pJ/Cycle 28dB output SNR hybrid Markov random field probabilistic-based circuit for noise immunity and energy efficiency.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Short path padding with multiple-Vt cells for wide-pulsed-latch based circuits at ultra-low voltage.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2011
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011