Circuit Partitioning for Huge Logic Emulation Systems. - Nan-Chi Chou; Lung-Tien Liu; Chung-Kuan Cheng; Wei-Jin Dai; Rodney Lindelof (DAC, 1994)

Fault emulation: a new approach to fault grading. - Kwang-Ting Cheng; Shi-Yu Huang; Wei-Jin Dai (ICCAD, 1995)

Local ratio cut and set covering partitioning for huge logic emulation systems. - Nan-Chi Chou; Lung-Tien Liu; Chung-Kuan Cheng; Wei-Jin Dai; Rodney Lindelof (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Fault emulation: A new methodology for fault grading. - Kwang-Ting Cheng; Shi-Yu Huang; Wei-Jin Dai (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Hierarchical physical design methodology for multi-million gate chips. - Wei-Jin Dai (ISPD, 2001)

Hierarchical Front-End Physical Design Solution Drives Modified Hand-Off (invited). - Wei-Jin Dai; Michel Courtoy (ISQED, 2002)

Silicon virtual prototyping: the new cockpit for nanometer chip design. - Wei-Jin Dai; Dennis Jen-Hsin Huang; Chin-Chih Chang; Michel Courtoy (ASP-DAC, 2003)