Enhanced Core Circuits for scaling DRAM: 0.7V VCC with Long Retention 138ms at 125°C and Random Row/Column Access Times Accelerated by 1.5ns. - Nicky Lu; Chun Shiah; Juang-Ying Chueh; Bor-Doou Rong; Wei-Jr Huang; Ho-Yin Chen; Cheng-Nan Chang; Chia-Wei Chang; Tzung-Shen Chen (VLSI Circuits, 2021)